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Test connection method and apparatus for integrated circuit open circuit/ short-circuit

A technology of integrated circuit and test connection, which is applied in the direction of electronic circuit test, measuring device, measuring electricity, etc. It can solve the problems of long design and production cycle, many internal traces of PCB, and large area, so as to reduce design time and simplify design , The effect of reducing design costs

Active Publication Date: 2008-07-30
段超毅 +2
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

For integrated circuits with denser BGA packages, the number of PCB board layers is more, some as many as dozens of layers; and there are many internal traces in the PCB, the area of ​​the PCB is large, and the production cost of a PCB board is as high as 20,000-100,000 US dollars.
In addition, the PCB design and production cycle is long

Method used

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  • Test connection method and apparatus for integrated circuit open circuit/ short-circuit
  • Test connection method and apparatus for integrated circuit open circuit/ short-circuit
  • Test connection method and apparatus for integrated circuit open circuit/ short-circuit

Examples

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Embodiment Construction

[0038] Below in conjunction with the best embodiment shown in the accompanying drawings, it will be further described in detail.

[0039] Such as Figure 4 and Figure 5 As shown, the test connection method of the integrated circuit open circuit / short circuit of the present invention comprises the following steps:

[0040] ① Design a double-sided printed circuit board 1, the corresponding conductive points on the upper and lower sides of the pads of the printed circuit board 1 are connected to each other, and the pitch between the conductive points is the same as that of the conductive points of the integrated circuit 8 under test. The pitch specifications between them are the same;

[0041] ② making electrical contact between each conductive point of the pad on the printed circuit board 1 and each conductive point of the integrated circuit 8 under test by means of the probe 51 in the test socket 5;

[0042] ③ Weld each conductive point of the pad below the printed circuit ...

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PUM

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Abstract

The invention relates to a connection testing method for open circuit / short circuit of an integrated circuit, and a device thereof. The method comprises the following steps: designing a double-faced printed circuit board (1) or an insulating board (6), wherein the specification of pin pitches among conduction points on the upper and the lower faces of the bonding pad below the printed circuit board (1) or the specification of pin pitches among conduction terminals on the insulating board (6) is the same as that of the pin pitches among conduction points of a tested integrated circuit (8); and electronically connecting respectively the conduction points of the bonding pad below the printed circuit board (1) or the conduction terminals of the insulating board (6) with a receptacle / plug (3) via wires (2), wherein the receptacle / plug (3) is plugged with an open circuit / short circuit testing machine (4). The invention has the following technological effects: the printed circuit board or the insulating board is only designed to be a double-faced layer without internal wiring, so as to remarkably reduce design cost and time; and without the internal wiring, the area of the printed circuit board is reduced to 1 / 4 of the original area, and the material cost is remarkably reduced.

Description

technical field [0001] The present invention relates to a method for electrical performance testing or fault detection of semiconductor devices, in particular to a method for testing integrated circuits. Background technique [0002] With the development of SMT (Surface Mount Technology, Surface Mount Technology), semiconductor integrated circuit ICs especially use ball grid arrays (BGA for short), package ICs, and the input / output (I / O) pins of the package The arrangement is a grid array, and ICs with solder balls at the ends of the pins are developing in the direction of high density and small pitch. The number of I / O pins in the package will gradually increase from dozens to hundreds, and it may reach 2 thousand roots. The denser the packaging, the more problems the integrated circuit inevitably presents. The most common problem is an open circuit or short circuit (OPEN / SHORT) inside the integrated circuit. The open / short circuit test machine is a very important tool f...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/02G01R31/28
Inventor 段超毅王国华陶杉
Owner 段超毅
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