Semiconductor device model self-adapting parameter extraction method

Abstract

The invention discloses a self-adapting parameter extraction method independent of a specific semiconductor device model, wherein, not only an input file of the method not only comprises device test data and extraction flow control codes but also sorts a model formula waiting for extraction to C language subfunction codes which are combined with a model parameter list waiting for extraction to form the input file; according to extraction flow established in the input file, control search type algorithms are adopted for parameter extraction and simultaneously for tempo monitoring; after the whole extraction flow is finished, model parameters are outputted, and corresponding device model files are generated. The self-adapting parameter extraction method realizes self-adapting parameter extraction of the semiconductor device model and can be quickly applied to a novel semiconductor device analytical model and a semianalytic model without the necessity for reorganization of a parameter extraction system.

Description

technical field [0001] The invention relates to a parameter extraction technology of device models in the field of semiconductor integrated circuits, and is mainly used for extracting parameters of various analytical models and semi-analytic models of semiconductor devices. Background technique [0002] In the production process of semiconductor integrated circuits, the extraction of device model parameters is a very important link. At present, there are many methods used to extract the model parameters of semiconductor devices, the most common of which are the least square method based on partial differential calculation, Newton iteration method and McQuarter algorithm, etc. method to obtain device model parameters. [0003] With the development of semiconductor technology, semiconductor devices have entered the era of ultra-deep submicron and even nanometer, and various effects in the device have become more and more complex, so the compact model of semiconductor devices ...

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Problems solved by technology

[0005] 2) The flexibility of the extraction strategy is poor

When performing step-by-step extraction, it must be carried out step by step according to a specific extraction strategy. Each step extracts a specific part of the model parameters based on the test data of a specific size and test conditions. It is also difficult to change and adjust the extraction steps. Changes and adjustments, the extraction results will also show great volatility

[0006] 3) The convergence of the extraction algorithm is poor

Because the derivatives of many parameters in the analytical model are very complex, and the derivative functions of the model formulas or parameters often have special situations such as discontinuity, so when performing iterative calculations, there are often cases of non-convergence, and the extraction results exceed the value of the model parameters. The space or the situation of losing its physical meaning will often happen, and it is often necessary to repeatedly adjust and calculate to get a satisfactory result

[0007] 4) The calculation and processing of the model formula is too complicated

Due to the complexity of the analytical model and the rapid increase of model parameters, the calculation of partial differentials for model parameters has also become very complicated. Even if a specific formula calculation software is used, its calculation time and time-consuming formula verification process are quite astonishing

[0008] 5) The extraction program has poor reusability

The extraction methods based on partial differentiation are all aimed at specific model formulas. After changing the model formula or making some small modifications to the model formula, the entire parameter extraction process must be restarted from the beginning, and the reusability of the entire extraction program is very poor.

[0009] Some of the above shortcomings have seriously affected the extraction results and extraction speed of model parameters during the semiconductor period, restricting the development speed and development cycle of new structures and new processes for semiconductor devices

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