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Realization method for multiple program sharing SPM on MPSOC

A multi-program and implementation method technology, applied in multi-program devices, energy-saving ICT, resource allocation, etc., can solve the problems of low utilization rate of ScratchPadMemory, lack of MPSOC optimization research, lack of multi-program optimization, etc., to achieve high efficiency, Fast speed and reduced energy consumption

Inactive Publication Date: 2010-10-13
ZHEJIANG UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0010] However, due to the analysis and optimization of only a single application program, the existing research lacks the optimization of multi-program parallelism and the optimization research of MPSOC
Therefore, the existing research has great limitations. Although the system performance can be improved to a certain extent, the utilization rate of ScratchPad Memory is not high, and the feasibility of actual use is less

Method used

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  • Realization method for multiple program sharing SPM on MPSOC
  • Realization method for multiple program sharing SPM on MPSOC
  • Realization method for multiple program sharing SPM on MPSOC

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Embodiment Construction

[0032] The present invention is a kind of realization method that multi-channel program shares SPM on MPSOC, combines below figure 1 Describe its specific implementation process.

[0033] 1) Divide the processor core group:

[0034] When multiple processor cores are integrated on a chip, the computing resources of the processor increase. Although the increase in the number of on-chip processor cores improves the computing power of the processor, the cost of communication may also affect the running of the program due to the need for communication among the multiple processor cores on the chip. In order to make full use of the multiple processor cores on the chip, these processor cores on the chip are re-divided logically. By grouping the processor cores, different processor core groups are formed to reduce access delays. For MPSOC, the most important on-chip computing resources are these processor cores. Therefore, the main basis for the division is the processor core.

[...

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Abstract

The invention discloses a method for realizing multiprogramming shared SPM on MPSOC. The method has the following main functions of extracting a storage object through compilation and analysis for the traditional embedded programs and carrying out coordination among a plurality of programs through a special SPM manager of an operating system, so as to achieve the objective of multiprogramming shared SPM. The method realizes the multiprogramming shared SPM on MPSOC, accelerates the programs, decreases the time consumed on memory access, and reduces the energy consumption caused by memory access, so as to improve the whole performance of embedded systems. The method realizes the effective use to the SPM, fully utilizes the high speed characteristic of the SPM, and raises the execution efficiency of the programs. The use of the SPM in the method is favorable for reducing the program energy consumption caused by memory access in running process.

Description

technical field [0001] The invention relates to the technical field of embedded system optimization, in particular to a method for realizing multi-program sharing SPM on MPSOC. Background technique [0002] With the continuous progress of semiconductor technology, the integration density of VLSI (Very Large-Scale Integrated) is increasing significantly. The continuous improvement of the integration level on a single chip makes the SOC (System on Chip) technology developed and applied. SOC technology integrates all functional modules of a system into a single chip, so as to realize the integration of complete system functions on a single chip. [0003] Integrated on the SOC chip is usually an IP (intellectual property, Intellectual Property) core. These reusable IP cores include embedded processors, memory modules, interface modules and application-specific processing components. The IP core integrated on the SOC can be divided into three categories: soft core (Soft IP), w...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/50G06F9/38
CPCY02B60/142Y02B60/167Y02D10/00
Inventor 陈天洲胡威严力科谢斌黄江伟章铁飞冯德贵项凌祥蒋冠军陈度
Owner ZHEJIANG UNIV
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