IC testing methods and apparatus

Abstract

A shift register circuit is provided for storing instruction data for the testing of an integrated circuit core. The shift register circuit comprises a plurality of stages, each stage comprising a serial input (si) and a serial output (so) and a parallel output (wir_output) comprising one terminal of a parallel output of the shift register circuit. A first shift register storage element (32) is for storing a signal received from the serial input (si) and providing it to the serial output (so) in a scan chain mode of operation. A second parallel register storage element (38) is for storing a signal from the first shift register storage element (32) and providing it to the parallel output (wir_output) in an update mode of operation. The stage further comprises a feedback path (40) for providing an inverted version of the parallel output (wir_output) to the first shift register storage element (32) in a test mode of operation. This configuration enables testing of each shift register stage using the existing control lines. In particular, the inverted signal can be clocked to propagate through the shift register storage element and the parallel register storage element, and the eventual inversion of the output is monitored to indicate that the inverted signal has propagated through the circuitry.

Description

technical field [0001] The present invention generally relates to semiconductor integrated circuit testing, and specifically relates to a core testing method and equipment. Background technique [0002] One common testing technique used for semiconductor integrated circuit (IC) testing is the scan testing technique. The technique is essentially using a test pattern (termed "vector") at the pins of the device package and monitoring the output response for a specific time depending on the device clock speed. A set of test vectors is used to enable determination of device behavior under test. These vectors are designed to allow detection of manufacturing defects in devices. [0003] As the number of transistors used in integrated circuits increases, the ability to reuse integrated circuit designs becomes increasingly important. An important issue regarding the re-use of design functions (termed "cores") is the ability to test these cores without refactoring test methods so t...

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Problems solved by technology

Testing of system-on-chip (SoC) circuits with multiple functional cores is also becoming more of a challenge

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