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System and method for testing carrier plate and integrated circuit element

A technology for testing carrier boards and integrated circuits, which is applied to the testing of electrical components, circuits, and electronic circuits, and can solve problems such as high cost and complex structure of test carrier boards

Inactive Publication Date: 2008-12-24
KING YUAN ELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The structure of the test carrier board 19 is quite complicated, generally composed of multi-layer boards, and the distance between the solder joints (pads) on it is very small. It must be processed by semiconductor-level manufacturing processes, and the cost is very expensive.

Method used

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  • System and method for testing carrier plate and integrated circuit element
  • System and method for testing carrier plate and integrated circuit element
  • System and method for testing carrier plate and integrated circuit element

Examples

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Embodiment Construction

[0071] Since the present invention discloses a terminal test (final test) of an integrated circuit element of a back-end semiconductor manufacturing process, the basic principle of the semiconductor manufacturing process used therein has been understood by those skilled in the art, so the following Description, no complete description. At the same time, the accompanying drawings hereinafter are used to express structural representations related to the features of the present invention, and are not and need not be completely drawn according to actual dimensions, so please describe first.

[0072] Please refer to Figure 2A , which is a first preferred embodiment provided according to the present invention, is a test board (test board) 40 with a ZIF connector. The test carrier 40 includes a test substrate 41, a plurality of second electrical pads (not shown in the figure), a plurality of ZIF connectors 42 and a plurality of detachable and adjustable locking components (adjustab...

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PUM

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Abstract

The invention discloses a test board with a ZIF connector, comprising a test substrate, a plurality of ZIF connectors and a plurality of locking components which can be adjusted in a dismountable way. The test substrate is provided with a first surface, a second surface and a plurality of groups of first through holes which vertically pass through the first surface and the second surface of the substrate; the two sides of a plurality of groups of first through holes on the first surface are provided with first electric joints which are arranged in pairs. A plurality of second electric joints are arranged on the second surface of the test substrate and are electrically conductive to the first electric joints. A plurality of ZIF connectors are arranged on the first surface of the test substrate; each ZIF connector is provided with a plurality of parallel second through holes which pass through the top surface of the ZIF connector to the bottom surface; the bottom of each ZIF connector is provided with electric terminals which are arranged in pairs and used for being correspondingly contacted with the first electric joints of the test substrate.

Description

technical field [0001] The invention relates to a test carrier board and a test system for testing integrated circuit components, in particular to an assembly method of the test carrier board and the test system with a ZIF connector therein. Background technique [0002] Generally, when an integrated circuit component is subjected to a final test, the electrical contacts or pins of the integrated circuit component need to be pressed together with the probes (Pogo Pins) in the test socket (Socket). Therefore, the test signal can be transmitted to the tester through the probe (Pogo Pin) to determine whether the integrated circuit element is good or bad. Please refer to Figure 1A , is a schematic diagram of a test carrier board used for testing integrated circuit components. The control system 10 sends a test signal, which is transmitted to a test head (generally referred to as a tester in the industry) 12 through a cable 11. The test head 12 has a motherboard (motherboard) 1...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01R1/04G01R31/28H01R12/16H01R13/631H01R12/71
Inventor 林源记
Owner KING YUAN ELECTRONICS
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