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Low offset comparator and offset cancellation method thereof

A technology of offset elimination and comparator, which is applied in multiple input and output pulse circuits, etc., and can solve the problem that the gain value A of the pre-amplifier 210 cannot be too large, the pre-amplifier 210 hangs up, and the input range of the comparator 200 is small, etc. question

Inactive Publication Date: 2009-06-03
HIMAX TECH LTD
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AI Technical Summary

Problems solved by technology

The input voltage Vin received by the comparator 200 is fed in in the form of DC coupling, so the input range of the comparator 200 is relatively small
In addition, the gain value A of the pre-amplifier 210 should not be too large. If the gain value A is too large, the offset voltage will be amplified and the pre-amplifier 210 will hang up.

Method used

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  • Low offset comparator and offset cancellation method thereof
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  • Low offset comparator and offset cancellation method thereof

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Embodiment Construction

[0028] The present invention provides a low offset comparator, with a cascade structure, combined with input offset storage technology and output offset storage technology, so that the low offset comparator can more effectively eliminate the offset voltage, And it has high circuit operation speed, and can be widely used in various comparator circuits.

[0029] Please refer to FIG. 3 , which shows a circuit diagram of a low offset comparator according to a preferred embodiment of the present invention. The low offset comparator 300 includes a preamplifier 305 and a latch 340 . The pre-amplifier 305 includes a first output offset storage stage 310 , N input offset storage stages 321 - 32N in series and a second output offset storage stage 330 , wherein N is a positive integer. The first output offset storage stage 310 is used for receiving an input voltage Vin. The input offset storage stages 321 - 32N are sequentially coupled in a cascade form and connected after the first ou...

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Abstract

The present invention provides a low offset comparator and offset cancellation method thereof. The low offset comparator includes a preamplifier and a latch. The preamplifier includes a first output offset storage stage, a cascade of input offset storage stages and a second output offset storage stage. The first output offset storage stage receives an input voltage. The cascade of input offset storage stages is connected to follow the first output offset storage stage. The second output offset storage stage is connected to follow the input offset storage stages. The latch is connected to follow the preamplifier. The low offset comparator is characterized in that the cascade of input offset storage stages, the second output offset storage stage and the first output offset storage stage are configured to sequentially leave an offset cancellation mode, and the input offset storage stages, when leaving the offset cancellation mode, are to open their unity-gain feedback loops before disconnecting their input offset storages from a ground voltage.

Description

technical field [0001] The present invention relates to a low offset comparator and its offset elimination method, and in particular to a low offset comparator and its offset elimination method which more effectively eliminates the offset voltage and has high circuit operation speed. Background technique [0002] In the comparator, a small amount of noise may affect the circuit operation results, and due to the mismatch of the components, the comparator will generate an offset voltage when performing the amplification operation, so the technology of offset cancellation (offset cancellation) must be used to perform compensation operations. There are two commonly used technologies for offset elimination, namely input offset storage (input offset storage, IOS) and output offset storage (output offset storage, OSS). [0003] Please refer to figure 1 , which shows the circuit diagram of a conventional comparator using input offset memory technology. The comparator 100 includes...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K5/24
CPCH03K5/24
Inventor 黄志豪
Owner HIMAX TECH LTD
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