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Time-domain paralleling sampling rate transformation method

A sampling rate and sampling rate technology, applied in the field of high-speed remote sensing satellite signal transmission and reception, digital information transmission

Active Publication Date: 2009-06-17
TSINGHUA UNIV
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  • Application Information

AI Technical Summary

Problems solved by technology

This method has a relatively simple hardware structure and does not require a complex clock loop, but requires parallel rate adjustment of the sampled data

Method used

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  • Time-domain paralleling sampling rate transformation method
  • Time-domain paralleling sampling rate transformation method
  • Time-domain paralleling sampling rate transformation method

Examples

Experimental program
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Embodiment Construction

[0060] step 1:

[0061] The digital signal obtained from the high-speed ADC is input into the time-domain parallel CIC filter in parallel to complete the conversion of a wide range of sampling rates, for example, the sampling rate is reduced from 2000MHz to 8MHz, of which Figure 3 ~ Figure 6 The structural block diagram of the filter and the structural block diagrams of the three parts (parallel accumulator, decimator and parallel differentiator) that make up the filter are given respectively.

[0062] image 3 It is a block diagram of the overall structure of the CIC filter, which consists of 1 to 4 parallel accumulators connected in series, a parallel decimator and 1 to 4 parallel differentiators connected in series. Among them, the parallel accumulator completes the accumulation calculation of the input parallel signals, and outputs a parallel accumulated signal with a certain phase difference. The parallel extractor completes the parallel extraction, and the parallel dif...

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Abstract

The invention provides a method for adjusting a time domain parallel sampling rate, which is applicable to the technical field of digital information transmission. The method is characterized in that all the treatments adopt parallel algorithms and large-scale digital sampling rate conversion is realized by combining a CIC filter, a CFIR filter, a PFIR filter and a fractional space decimation filter; wherein the CIC decimation filter is realized by adopting a time domain parallel structure and the CFIR filter and the PFIR filter adopt a time domain parallel structure based on a multiphase filter. The fractional space withdrawal device consists of a controller and a polynomial interpolator; the controller accelerates the processing speed during the hardware realization by adopting a method that all the parallel branches are mutually independent; the polynomial interpolator is realized by look-up and saves the limited logic and multiplier unit resources in a programmable logic device. The system is applicable to the realization of full-digital circuits, especially the realization of a field-programmable gate array (FPGA).

Description

technical field [0001] The invention belongs to the field of digital information transmission, and particularly relates to a parallel method to realize a large-scale rational multiple digital sampling rate conversion. The algorithm is applied to the field of high-speed data transmission, such as high-speed remote sensing satellite signal transmission and reception. Background technique [0002] After entering the 21st century, the rise of aerospace technology and its application in the military has rapidly expanded the battlefield airspace from the atmosphere to outer space, expanded the fields of military activities and national defense security, and changed the form of modern warfare. Remote sensing satellite technology is an important part of it. It refers to the use of various sensors (such as visible light, infrared detection, radar, etc.) to obtain ground information on a space-based satellite platform. An applied science and technology of shape, size, location, proper...

Claims

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Application Information

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IPC IPC(8): G01S7/48
Inventor 潘长勇杨再初张彧王劲涛杨知行
Owner TSINGHUA UNIV
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