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Real-time multi-path multiplexing synchronous high-speed transmission serial bus protocol

A serial bus, high-speed transmission technology, applied in the field of data exchange, can solve problems such as lack, and achieve the effect of less CPU intervention and low time overhead

Active Publication Date: 2009-06-17
NR ELECTRIC CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0017] In summary, there is still a lack of a backplane serial bus technology suitable for power system control and protection applications that combines high-speed, large-capacity and support for peer-to-peer data transmission between multiple nodes

Method used

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  • Real-time multi-path multiplexing synchronous high-speed transmission serial bus protocol
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  • Real-time multi-path multiplexing synchronous high-speed transmission serial bus protocol

Examples

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Embodiment Construction

[0036] Illustrate the specific implementation of the present invention with a specific implementation case: in this example, the device is a system that includes 3 HTM bus nodes, and each node includes an FPGA to realize the relevant functions specified by the HTM bus protocol, and the CPU and FPGA The CPU can access all the data on the HTM bus through the FPGA. In this example, the specific implementation of the HTM bus protocol is as follows:

[0037] 1. The HTM bus has the following signals: control signal, clock signal, data signal, independent clock signal used in this example;

[0038] (a) Control signal: controlled by the master node. In this example, the master node is designated by the upper layer software. Any node can be used as the master node, but the master node must be unique in the system;

[0039] (b) Clock signal: In this example, a 40MHz clock is used as the clock signal;

[0040] (c) Data signal: In this example, two data signal lines are used, so the actua...

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Abstract

The invention relates to a real time multiplexed synchronous high speed transmission serial bus protocol, wherein transmission signals of a series bus in the protocol comprise three groups of signals of control signals, clock signals and data signals, any node can be appointed in advance as an only main node on the bus, the control signals are sent by the main node to control each node to send data in turn, the sending order and the data length of each node are preset, all data on the bus can be received through the clock signals and the data signals, the control signals of the main node comprise three states: (a) idle states, a synchronous series bus under the states is controlled by the main node, (b) node switching states, the states represent that data transmission of a preceding nodeis finished, the transmission of a next node is about to start, the node which obtains the bus control right discards the bus control right under the states, a next bus owner obtains the bus control rights and starts outputting the bus signals, (c) data transmission states, the states represent that the node which obtains the bus control right is outputting signals to the bus.

Description

technical field [0001] The invention relates to a technology for timing and large-capacity data exchange between nodes in industrial control equipment and power system control and protection equipment through a serial backplane bus and equipment using the technology. Background technique [0002] In the field of industrial control and power system control and protection, as the control functions become more and more complex, not only do multiple CPUs or DSPs need to work together to complete the corresponding control and protection tasks, but also the amount of data that needs to be exchanged between CPUs or DSPs is also increasing. Therefore, the system has more and more requirements on the bus bandwidth, which is required to be at the level of 100Mbps. To solve the problem of how to exchange data in real time and at high speed within one control cycle between multiple CPUs, the usual practice is to complete such tasks through parallel data buses such as PCI, VME and other ...

Claims

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Application Information

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IPC IPC(8): H04L29/06H04L12/40
Inventor 冯亚东李九虎李彦刘国伟陈勇夏雨
Owner NR ELECTRIC CO LTD
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