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Thin type transistor structure and dyamic ram and manufacturing method therefor

A technology of dynamic random access and manufacturing methods, which is applied in semiconductor/solid-state device manufacturing, transistors, semiconductor/solid-state device components, etc., and can solve problems such as limited space saved

Inactive Publication Date: 2009-08-19
PROMOS TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Generally speaking, Folded Bit Line is used to reduce the number of bit line contact windows (BC), which can further save the space of a BC to reduce the size of DRAM, but it can save limited space under

Method used

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  • Thin type transistor structure and dyamic ram and manufacturing method therefor
  • Thin type transistor structure and dyamic ram and manufacturing method therefor
  • Thin type transistor structure and dyamic ram and manufacturing method therefor

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Embodiment Construction

[0032] Generally speaking, a basic memory unit of a dynamic random access memory (DRAM) is composed of a metal-semiconductor field effect transistor and a capacitor. In DRAM, a memory array (Memory Array) is composed of many basic memory units, and is controlled by corresponding word lines (WordLine) and bit lines (Bit Line). Although it can be understood that various other components are also included in the DRAM, however, for the convenience of illustration and description, other components are not shown and described here.

[0033] Please refer to figure 1 , is a schematic cross-sectional view of a dynamic random access memory with a thin transistor structure according to a preferred embodiment of the present invention. In this embodiment, in order to simplify the description, only the structure of four transistors connected to each other on the bit line is taken as an example for description.

[0034] The DRAM includes a plurality of thin transistors 210 , each of which ...

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PUM

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Abstract

The invention provides a dynamic random-access memory with a thin transistor structure, which comprises a plurality of thin transistors and a deeply buried layer connection area arranged in an active area. The transistors are positioned in the active area and the active area comprises a drain area, a source area and a gate area, wherein the drain area and the source area are positioned at the same side of the gate area and arranged with an upper and lower relationship, and the source area is positioned in a large-inclination injection area. Moreover, the drain areas of the transistors are connected mutually by the deeply buried layer, forming a bit line.

Description

technical field [0001] The present invention relates to a transistor structure, a manufacturing method thereof, a dynamic random access memory having the transistor structure and a manufacturing method thereof, in particular to a thin transistor structure, a manufacturing method thereof and a dynamic random access memory having the thin transistor structure and methods of manufacture thereof. Background technique [0002] Dynamic Random Access Memory (DRAM) is the most important and main memory component in the semiconductor and computer industries. Although based on certain technical and application factors, other types of memory are widely used in the entire information industry, but due to the high performance and low cost of DRAM, so far, DRAM has always been the most used , the most widely used, the lowest price and the most important manufacturing technology of a memory. [0003] Providing more storage capacity and faster memory chips is one of the driving forces beh...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/108H01L23/522H01L29/786H01L21/8242H01L21/768H01L21/336H10B12/00
Inventor 陈伟钧
Owner PROMOS TECH INC