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Reading memory cells using multiple thresholds

A storage unit, multiple read technology, used in read-only memory, information storage, static memory, etc.

Active Publication Date: 2009-12-09
APPLE INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Hard errors can occur at cells whose threshold voltage drifts from its expected level causing read errors

Method used

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  • Reading memory cells using multiple thresholds
  • Reading memory cells using multiple thresholds
  • Reading memory cells using multiple thresholds

Examples

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Embodiment Construction

[0058] overview

[0059] Embodiments of the present invention provide improved methods and systems for reading data from analog memory cells, such as flash memory cells. In some embodiments described below herein, a memory signal processor (MSP) stores data encoded with an error correction code (ECC) in an array of analog memory cells. MSPs store encoded data by writing respective analog values ​​into analog memory cells. The analog values ​​are selected from a set of nominal analog values ​​representing the data.

[0060] The MSP reads data from an analog memory cell by performing multiple read operations that compare the analog value written to the memory cell with multiple read thresholds. The read thresholds are set such that at least two read thresholds lie between a pair of adjacent nominal values. The plurality of threshold comparisons generates a plurality of comparison results for each analog memory cell. MSP computes soft metrics based on multiple comparison resu...

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PUM

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Abstract

A method for operating a memory (28) includes storing data, which is encoded with an Error Correction Code (ECC), in analog memory cells (32) of the memory by writing respective analog input values selected from a set of nominal values to the analog memory cells. The stored data is read by performing multiple read operations that compare analog output values of the analog memory cells to different, respective read thresholds so as to produce multiple comparison results for each of the analog memory cells. At least two of the read thresholds are positioned between a pair of the nominal values that are adjacent to one another in the set of the nominal values. Soft metrics are computed responsively to the multiple comparison results. The ECC is decoded using the soft metrics, so as to extract the data stored in the analog memory cells.

Description

[0001] Cross References to Related Applications [0002] This application claims the benefit of the following patent applications: U.S. Provisional Patent Application 60 / 863,506, filed October 30, 2006, U.S. Provisional Patent Application 60 / 867,399, filed November 28, 2006, U.S. Provisional Patent Application Provisional Patent Application 60 / 888,828, U.S. Provisional Patent Application 60 / 889,277, filed February 11, 2007, U.S. Provisional Patent Application 60 / 892,869, filed March 4, 2007, U.S. Provisional Patent Application, filed March 13, 2007 Application 60 / 894,456, U.S. Provisional Patent Application 60 / 917,653, filed May 12, 2007, U.S. Provisional Patent Application 60 / 950,884, filed July 20, 2007, and U.S. Provisional Patent Application 60, filed July 22, 2007 / 951,215, the disclosures of each of the patent applications are hereby incorporated by reference into this specification. field of invention [0003] The present invention relates generally to memory devices, ...

Claims

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Application Information

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IPC IPC(8): G11C11/34G11C16/04G11C16/06G11C29/00
CPCG11C11/5642G11C7/16G11C16/24G11C27/005G11C16/26
Inventor N·萨莫O·沙尔维D·索科洛夫
Owner APPLE INC
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