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CMOS subthreshold high-order temperature compensation bandgap reference circuit

A high-order temperature compensation and reference circuit technology, applied in the direction of adjusting electrical variables, control/regulation systems, instruments, etc., can solve the problems of large chip footprint and complex circuits, and achieve the effect of high power supply rejection ratio and low temperature coefficient

Inactive Publication Date: 2009-12-23
SOUTHEAST UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

This leads to complex circuits and a large chip footprint, which brings certain limitations in actual use.

Method used

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  • CMOS subthreshold high-order temperature compensation bandgap reference circuit
  • CMOS subthreshold high-order temperature compensation bandgap reference circuit
  • CMOS subthreshold high-order temperature compensation bandgap reference circuit

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Embodiment Construction

[0013] Below in conjunction with accompanying drawing, the technical scheme of invention is described in detail:

[0014] In the feedback control loop, in order to take into account the common requirements of temperature coefficient compensation, power supply rejection ratio and process robustness, a three-way mutual coupling bias is used to replace the traditional bias structure. Circuit structure such as figure 1 As shown, the high output impedance of the wide-swing PMOS Cascode current mirror is used to improve the PSRR characteristics of the circuit; the internal closed-loop negative feedback loop composed of PM7→NM3→NM1→PM1→PM7 has similar performance to op amp control, not only avoids the disadvantages of random offsets that are difficult to control, suppression includes supply V DD Various disturbances including noise significantly improve the matching and stability of the bias circuit. At the same time, there is a positive feedback loop composed of PM7→NM3→NM0→MN7 in...

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Abstract

The invention discloses a CMOS subthreshold high-order temperature compensation bandgap reference circuit comprising a current mould bandgap reference circuit and a feedback control loop, wherein the current mould bandgap reference circuit comprises six PMOS pipes, four NMOS pipes and five resistors, and the feedback control loop comprises two PMOS pipes and four NMOS pipes. The invention has lower temperature coefficient and higher power supply suppression ratio. By adopting a CMOS technology library with a CSMC0.5mum standard, the obtained temperature coefficient temperature coefficient is after simulation only 0.42ppm / DEG C, and the PSRR under low frequency reaches more than 78dB.

Description

technical field [0001] The invention relates to a CMOS subthreshold high-order temperature-compensated bandgap reference circuit, which belongs to the technical field of power supplies, and specifically relates to a high-order temperature-compensated bandgap reference circuit based on a CMOS subthreshold region and controlled by circuit working state points. Background technique [0002] The in-depth development of the SOC digital-analog hybrid system puts forward higher and higher requirements for high-precision and low-noise bandgap voltage references, and the reduction of the reference temperature coefficient, the improvement of the power supply rejection ratio and the enhancement of process stability are becoming more and more difficult to achieve. . [0003] At present, most mainstream high-performance voltage references use parasitic BJT tubes in standard CMOS processes and additional high-order temperature curvature compensation control structures. However, the gener...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G05F1/46
Inventor 吴金郑丽霞王永寿赵霞常昌远
Owner SOUTHEAST UNIV
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