Semiconductor device and method for fabricating same

Abstract

The invention provides a semiconductor device and a method for fabricating a semiconductor device. The method for fabricating a semiconductor device is disclosed. The method includes providing semiconductor substrate having a first region and a second region, forming a high-k dielectric layer over the semiconductor substrate, forming a capping layer over the high-k dielectric layer, forming a metal layer over the capping layer, removing the metal layer and capping layer in the second region, forming a polysilicon layer over the metal layer in the first region and over the high-k dielectric layer in the second region, and forming an active device with the metal layer in the first region and forming a passive device without the metal layer in the second region. The invention can solve the problems of incompatible materials, complicated technology and heat cost in CMOS technology for integrating high-k dielectric layer / metal gate electrode.

Description

technical field [0001] The invention relates to a semiconductor element, in particular to a double gate semiconductor element. Background technique [0002] In the process of IC development, when the geometric size of IC (such as the smallest element (or line) that can be obtained by the process) gradually shrinks, the density of functional elements (such as interconnection elements per unit chip area) gradually increases. . The benefit of the size reduction process is to increase production efficiency and reduce related process costs. However, the size reduction also results in relatively high power dissipation, which can be solved by using low power dissipation devices, such as complementary metal oxide semiconductors (CMOS). A CMOS device generally includes a gate oxide layer and a polysilicon gate electrode. When the device size is gradually reduced, in order to improve the performance of the device, the gate oxide layer and the polysilicon gate metal need to be repla...

AI Technical Summary

Problems solved by technology

However, integrating high-k metal gate technology into the above devices remains a challenge

In some cases, the resistance of polysilicon resistors and polysilicon electronic fuses (eFuses) may be lower than required, thus rendering these components useless

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