Quick implementation, loading and storage command module

Abstract

The invention relates to a quick implementation, loading and storage command module, and the module comprises a correlation identification unit, a command address generation unit and a command cache unit, wherein the correlation identification unit is used for judging data correlation between a storage command and a previous loading command when simultaneously meeting the conditions that the current command is the storage command and data to be stored by the current command is derived from the previous loading command which is not completed; the command address generation unit is used for calculating addresses of a high-speed cache and an external memory on the chip to be accessed by the current loading / storage command according to the input loading / storage command flow; and the command cache unit consists of items of the command cache unit and is used for temporarily caching all information which is derived from the correlation identification unit and is outputted by the command address generation unit and related to the implementation of the storage command, and a bypass is simultaneously derived from the returned data when completing the previous loading command. When the data correlation exists, the quick implementation, loading and storage command module can avoid an assembly line from being locked and improve the performance of an embedded processor.

Description

technical field [0001] The invention relates to the field of embedded processors, in particular to a fast-execution loading and storing instruction module of the embedded processor. Background technique [0002] In recent years, with the development of high-performance embedded processors, a large number of tasks that originally needed to be completed with the assistance of hardware accelerators can now be completed independently by embedded processors. This greatly promotes the widespread application of embedded processors, and also greatly shortens the design cycle of electronic products and reduces the maintenance cost of electronic products. [0003] Major processor manufacturers usually improve the overall performance of embedded processors by improving the efficiency and utilization of each execution unit inside the processor (such as multiple instruction issuance, out-of-order execution, etc.). At the same time, a large number of floating-point instructions and digit...

AI Technical Summary

Problems solved by technology

A reserved stack is added to each execution unit. In view of the short execution cycle of the logic instruction unit, coprocessor instruction processing unit and digital signal processing instruction, the correlation can basically be released before the reserved stack is filled. Therefore, the reserved stack technology is very important for It is enough for logic instruction unit, coprocessor instruction processing unit and digital signal processing instruction; and because the load store instruction needs to interact with the off-chip memory, when the data dependency occurs in the load store instruction, the load store instruction processing unit will Congestion occurs, although the reserved stack of the load-store instruction processing unit can still receive several subsequent load-store instructions, but in the instruction flow that requires a large amount of memory movement, the load-store instruction processing unit will stall after the reserved stack is filled quickly , and then block the launch unit, eventually causing the entire processor pipeline to stall

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