Pin and substrate combined semiconductor package and manufacturing method thereof

Abstract

The invention discloses a pin and substrate combined semiconductor package, which comprises a substrate provided with a first surface and a second surface, a plurality of pins fixedly connected to the first surface through inner leads, at least one semiconductor chip connected to a chip connecting area of the substrate, a plurality of bonding wires used for respectively electrically connecting the semiconductor chip to the substrate and the pins, and packaging colloid used for cladding the bonding wires, the semiconductor chip, the inner leads and partial substrate. After the packaging colloid is formed, outer leads of the pins and the second surface are exposed out of the packaging colloid, so that electrical connecting pads passing through the outer leads and formed on the second surface serve as input / output connecting ends of the semiconductor chip and external devices; because the input / output connecting ends are increased, the semiconductor package is suitable for high integrated semiconductor chips, and the electrical property of the semiconductor package can be improved; and the positions and number of the electrical connecting pads on the substrate can be adjusted as required, so the designability of the semiconductor package can be improved.

Description

technical field [0001] The present invention relates to a semiconductor package, in particular to a semiconductor package using pins as input / output terminals for electrical connection between a semiconductor chip and an external device (External Device). Background technique [0002] The lead frame is a chip frame made of conductive metal, generally made of copper material, and includes a die pad in the center and a plurality of leads on the periphery; The front side is used to place a semiconductor chip, and electrically connect the chip on the crystal pad to the lead pins through bonding wires. After the bonding wire manufacturing process is completed, an electrically insulating packaging compound (epoxy-molded compound, EMC; or encapsulation body) is generally formed to cover the semiconductor chip, but exposed to the outer ends of the leads. To be used as the external electrical connection point of the chip. [0003] The exposed-pad semiconductor packaging structure i...

AI Technical Summary

Problems solved by technology

[0006] To sum up, how to provide a semiconductor package with multiple input / output connections (I / Oconnections) to improve transmission efficiency and power connection effect, and avoid the aforementioned I / O connections of existing semiconductor packages Defects such as the limited increase in the number of terminals, the inability to flexibly adjust the location, and the complicated and messy line layout are problems that the industry needs to solve urgently.

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