Method and equipment for adjusting reference unit threshold parameter and testing system

Abstract

The invention provides a method for adjusting reference unit threshold parameters, which is used in the parallel testing process of a plurality of memory chips and comprises the following steps that: erasing operation is conducted to reference units of all chips to be tested on a testing machine; the current of the reference unit of each chip to be tested is measured, if the current is compliant with a first preset condition, a next step is conducted, and if not, re-erasing operation is conducted to the reference unit; programming operation is conducted to the reference unit of each chip to be tested; if the current of certain programmed reference unit is compliant with a second preset condition, the adjustment of the reference unit is completed and the chip is disconnected with the testing machine; and programming operation is continuously conducted to the chips to be test which are not disconnected with the testing machine until all chips to be tested are disconnected with the testing machine. Since the invention can really realize the parallel testing, the invention has the advantages that the overall testing time of the testing machine is greatly shortened and the testing costis greatly reduced.

Description

technical field [0001] The invention relates to the technical field of semiconductor chip testing, in particular to a method for adjusting reference cell threshold parameters during memory chip testing, a device for adjusting reference cell threshold parameters, and a testing system. Background technique [0002] In order to verify the correctness of memory products, a series of testing procedures will be carried out before the products leave the factory. These memory products may include non-volatile memory products (for example, flash memory Flash, or electrically erasable programmable read-only memory EEPROM, etc.), and may also include one-time programmable OTP memory. [0003] The general test process can include open circuit / short circuit test of product pin (pin), logic function test, electric erasing characteristic test (to judge whether the data in the non-volatile memory can be electrically erased and write new data ), program code test (reading the program code w...

AI Technical Summary

Problems solved by technology

[0008] Although such a solution can solve the individual differences in the electrical performance of each memory chip, it leads to the extension of the test time.

For example, if it takes 2 seconds to adjust the reference unit of a chip on average, it takes about 64 seconds to complete the test for 32 chips and then enter other test items such as logic functions, which will greatly increase the test time and test cost.

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