VLSI (Very Large Scale Integration) structural design method of parallel pipeline deblocking filter
A technology of deblocking and structural design, applied in the field of video encoding and decoding, can solve the problems of consuming computing resources, video quality and bit rate increase computing complexity, etc., to achieve high video quality and eliminate blocking effects
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[0058] figure 1 In the first embodiment shown, a highly efficient parallel deblocking filter VLSI structure is given. The source video sequence is buffered to two FIFOs through the external bus in units of macroblocks. The data in the FIFOs are organized as four pixels per row / column The form enters the boundary filter, is updated according to the filtering algorithm defined by the H.264 standard, and then passes through the on-chip loop, or temporarily stores on-chip storage, or completes the filtering and outputs the external bus.
[0059] figure 2 The second embodiment shown shows that the filtering algorithm is divided into a five-stage pipeline: reading data, threshold calculation, pre-filtering, filtering, and writing data. Pipeline technology truncates complex combinational logic to obtain a better maximum operating frequency to improve system throughput.
[0060] image 3The optimized storage strategy is given in the third embodiment shown, including storage of the...
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