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Two-layer and three-layer flash-memory devices, intelligent storage switch and two-layer and three-layer controllers

A technology of flash memory and controller, applied in the field of memory, can solve problems such as waste of storage space

Inactive Publication Date: 2010-12-22
INFOMICRO ELECTRONICS (SHENZHEN) CO LTD
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  • Summary
  • Abstract
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Problems solved by technology

[0021] The purpose of the embodiments of the present invention is to provide a two-layer flash memory device, aiming to solve the problem of serious waste of storage space due to pruning operations

Method used

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  • Two-layer and three-layer flash-memory devices, intelligent storage switch and two-layer and three-layer controllers
  • Two-layer and three-layer flash-memory devices, intelligent storage switch and two-layer and three-layer controllers
  • Two-layer and three-layer flash-memory devices, intelligent storage switch and two-layer and three-layer controllers

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Embodiment Construction

[0118] In order to make the object, technical solution and advantages of the present invention more clear, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0119] Figure 1A Shown is a smart memory switch using hybrid flash memory with a multilayer integrated controller. Smart memory switch 30 is part of multi-layer controller architecture (MLCA) 11 and is connected to host motherboard 10 via host memory bus 18 via upstream interface 34 . In addition, the smart storage switch 30 is also connected to the downstream flash storage device via the LBA storage bus interface 28 through the virtual storage bridges 42 and 43 .

[0120] The virtual storage bridges 42, 43 are protocol bridges that also provide physical signaling, such as driving and receivin...

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Abstract

Suitable for the memory field, the invention provides three-layer flash-memory devices, an intelligent storage switch and three-layer controllers. A solid-state hard disk is provided with the intelligent storage switch for recycling the waste and utilizing the flash memory storage deleted by deletion from the segment data capacity. The extra storage beyond the segment data capacity is accessed in an undivided scattered data manner. When more bad blocks appear over time, the segment date capacity is reduced. A first-level mapping graph stores the segment data and scattered data capacity of all flash-memory channels and maps the scattered data and the segment data. Each flash-memory channel is provided with a NVMD, which is provided with a controller of relatively low level, wherein the controller converts the LBA to the PBA used for accessing a flash memory in the NVMD. Each NVMD performs the wear balance and the bad block remapping. The NVMD enables to recycle source flash-memory blocks and shadow flash-memory blocks. A two-level intelligent storage switch can start a three-level controller.

Description

technical field [0001] The invention belongs to the field of memory, and in particular relates to a two-layer flash memory device, a three-layer flash memory device, an intelligent storage switch, a two-layer controller for the intelligent storage switch, and a three-layer controller for the intelligent storage switch. Background technique [0002] related application [0003] This patent application is a continuation-in-part of common application (CIP) of U.S. Serial No. 12 / 252,155, "Instruction Queue Intelligent Storage Transfer Manager for Segmenting Data into Raw Flash Modules," filed October 15, 2008 . [0004] This patent application is a co-application of Serial No. 12 / 186,471, "Multilayer Controller with Intelligent Memory Transfer Manager for Interleaving Multiple Single-Chip Flash Memory Devices," filed August 5, 2008 A partial continuation of the case. [0005] This patent application is a co-application of Serial No. 12 / 128,916, "Single-Chip Multimedia Card / Se...

Claims

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Application Information

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IPC IPC(8): G06F12/02G06F13/16G11C29/42
Inventor 俞一康马志刚李中和申明进
Owner INFOMICRO ELECTRONICS (SHENZHEN) CO LTD
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