Gate lead and manufacturing method thereof
A gate lead and manufacturing method technology, applied in semiconductor/solid-state device manufacturing, nonlinear optics, optics, etc., to achieve the effect of avoiding corrosion and corrosion
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment Construction
[0051] image 3 It is a schematic structural diagram of Embodiment 1 of the gate lead of the present invention, Figure 4 for image 3 Middle B-B sectional view, such as image 3 with Figure 4 As shown, the gate lead includes a gate layer region 1 , a gate layer protection layer 2 , a data layer region 3 , a data layer protection layer 4 , a second via hole 5 and a first via hole 9 . In this embodiment, the gate leads are formed on the substrate 8 . The gate layer protection layer 2 is located on the gate layer region 1; the data layer region 3 is located on the gate layer protection layer 2; the data layer protection layer 4 is located on the data layer region 3; the first via hole 9 is formed on the data layer layer protection layer 4, and located above the data layer region 3; the second via hole 5 is located above the gate layer region 1, and the gate layer region 1 and the data layer region 3 are connected through the second via hole 5. Specifically, in this embodim...
PUM
Login to View More Abstract
Description
Claims
Application Information
Login to View More 