Pulse width signal duty ratio detection circuit

A technology of duty ratio detection and pulse width signal, which is applied in the direction of monitoring pulse chain mode, etc., can solve the problems of long time, large area, and reduction of integrated circuit integration, and achieve the effect of improving reliability and integration

Active Publication Date: 2011-02-02
NINGBO SEMICON INT CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, in practical applications, the triangular wave voltage signal is often required to have very small ripples. According to the basic working principle of the traditional pulse width signal duty cycle detection circuit, a large resistor 71 and a capacitor 72 are required to meet the actual requirements.
However, the large resistor 71 and the large capacitor 72 no

Method used

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  • Pulse width signal duty ratio detection circuit
  • Pulse width signal duty ratio detection circuit
  • Pulse width signal duty ratio detection circuit

Examples

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Example Embodiment

[0023] Example 1:

[0024] A pulse width signal duty cycle detection circuit proposed by the present invention, its block diagram is as follows figure 1 As shown, it includes a ramp generating circuit 11, a pulse generating circuit 12 and a sample-holding circuit 13. The input terminal of the ramp generating circuit 11 inputs a clock input signal, and the ramp generating circuit 11 outputs a fixed ramp signal Vramp (such as Figure 6c shown), the period of the ramp signal Vramp is related to the measured pulse width signal (such as Figure 6a The cycle size is the same as shown), and the voltage value of the ramp signal Vramp changes from the voltage value V1 to the voltage value V2 in one cycle, such as Figure 6c shown; the pulse generation circuit 12 is used to monitor the falling edge of the measured pulse width signal, and the input of the pulse generation circuit 12 is as follows: Figure 6a As shown in the measured pulse width signal, the pulse generating circuit 12 ...

Example Embodiment

[0034] Embodiment 2:

[0035] The circuit structure of this embodiment is basically the same as that of the first embodiment, and the only difference is that the sample and hold circuit 13 is connected to the voltage buffer amplifying circuit 14, such as Figure 5 As shown, the voltage buffer amplifier circuit 14 is used for buffering the voltage value Vsh output by the output terminal of the sample and hold circuit 13, so as to improve the driving capability of the circuit. The input terminal of the voltage buffer amplifier circuit 14 inputs the voltage value output by the sample and hold circuit 13, the voltage buffer amplifier circuit 14 amplifies the input voltage value, and the output terminal of the voltage buffer amplifier circuit 14 outputs the amplified voltage value Vo, such as Figure 6e As shown, the amplified voltage value Vo is equal to the product of the gain A of the voltage buffer amplifier circuit 14 and the voltage value Vsh output by the sample and hold cir...

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Abstract

The invention discloses a pulse width signal duty ratio detection circuit, which comprises a slope generating circuit, a pulse generating circuit and a sampling hold circuit, wherein the slope generating circuit generates a constant slope signal; the pulse generating circuit outputs a pulse signal by monitoring a detected pulse width signal; the sampling hold circuit samples the slope signal under the control of the pulse signal, and holds the voltage value of the slope signal at each falling edge moment of the detected pulse width signal as an output signal of the sampling hold circuit; the held voltage value and the duty ratio of the detected pulse width signal have a direct functional relationship; and the magnitude of the held voltage value reflects the magnitude of the duty ratio of the pulse width signal, and the held voltage value has the function of reflecting the magnitude of the duty ratio of the pulse width signal in real time. The detection circuit can detect the magnitude of the duty ratio of the pulse width signal cycle by cycle so that the reliability of the pulse width signal duty ratio detection circuit is improved; and meanwhile, because the detection circuit does not need high resistance or capacitance, the integration degree of the circuit is greatly improved.

Description

technical field [0001] The invention relates to a duty ratio (Duty Ratio) detection technology, in particular to a pulse width signal duty ratio detection circuit. Background technique [0002] The traditional pulse width signal duty cycle detection circuit such as Figure 7 As shown, it includes a resistor 71 and a capacitor 72. The resistor 71 and capacitor 72 form an RC integrator. One end of the resistor 71 is connected to the measured pulse width signal, and the other end of the resistor 71 is connected to one end of the capacitor 72. The other end of the capacitor 72 is grounded, and the common connection end of the resistor 71 and the capacitor 72 is the output end of the detection circuit. Figure 7 The basic working principle of the traditional pulse width signal duty ratio detection circuit shown is to use the RC integrator to directly integrate the measured pulse width signal, and its steady-state output is a voltage signal similar to a triangular wave, such as F...

Claims

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Application Information

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IPC IPC(8): H03K5/19
Inventor 曾强
Owner NINGBO SEMICON INT CORP
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