Sign-free fixed point division and sign-free fixed point divider

An unsigned, fixed-point technology, which is applied in the fields of chips or circuits of electronic technology, communications, and computers, can solve the problems of long execution cycle, waste of resources and energy consumption, etc., achieve short execution cycle, save energy consumption, and shorten the calculation cycle Effect

Active Publication Date: 2011-03-16
NAT UNIV OF DEFENSE TECH
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, this type of algorithm ignores the characteristics of the dividend and the divisor. For example, when the dividend is much smaller than the divisor, the result can be directly obtained as 0, and this type of algorithm needs to be iterated continuously, that is, to perform shifting and subtraction operations. The execution cycle is long and causes waste of resources and energy consumption

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  • Sign-free fixed point division and sign-free fixed point divider
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  • Sign-free fixed point division and sign-free fixed point divider

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Embodiment 2

[0051] The unsigned fixed-point division of the present embodiment comprises the following steps:

[0052] 1. Pretreatment:

[0053] Read the dividend A of M bits and the divisor B of N bits, and set the initial values ​​of quotient Q and remainder R to zero;

[0054] Shift the divisor B to the left by 1 bit and add it to B to generate BB 1 , then B and BB 1 Shift left by 1, 2, ..., M-1 bits respectively and store in memory B, B respectively 1 、BB 1 、B 2 、B 1 B 2 ,...B i 、B i B i+1 Medium and satisfy B1 1 2 1 B 2 i i B i+1 , where B i B i+1 =B i +B i+1 , forming a reference divisor vector table, where B i It is the value of the divisor B shifted to the left by i bits and i=1, 2, ..., M-1.

[0055] 2. Positioning selection:

[0056] The dividend A is compared with the elements in the reference divisor vector table for less than selection,

[0057] 2.1a Find a reference divisor B in the reference divisor vector table i Satisfy B i ≤Ai B i-1 , where the sequ...

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Abstract

The invention discloses a sign-free fixed point division, comprising the following steps: processing a divisor by a preprocessing unit; inputting the processed divisor and a dividend into a positioning selection unit for positioning selection; performing iterative subtraction operation on the selection result by an iterative operation unit; returning the operation result to the positioning selection unit; and finally outputting a quotient and a remainder. The invention also discloses a sign-free fixed point divider, comprising the preprocessing unit, the positioning selection unit and the iterative operation unit which are successively connected, wherein the input end of the positioning selection unit is respectively connected with the output end of the preprocessing unit and the output end of the iterative operation unit, and the output end of the positioning selection unit is connected with the input end of the iterative operation unit. The invention has the advantages of simple hardware structure, less operation steps, short execution cycle, low hardware realization cost, low energy consumption and the like.

Description

technical field [0001] The invention relates to the field of chips or circuits of computer, communication and electronic technology, in particular to a fixed-point division method and an unsigned fixed-point divider. Background technique [0002] In digital signal processing, communication, image processing and video processing, it often involves the division of quotient and remainder by divisor and dividend. Traditional dividers such as the divider IP provided by programmable logic device design manufacturers such as Xinlix only provide the definition of the external interface, which is inconvenient to transplant, and consumes a lot of resources and takes too long to calculate. Therefore, in the design of existing dividers, various optimization algorithms are often improved to achieve the purpose of reducing hardware implementation costs and shortening the execution cycle, so various fixed-point dividers appear. [0003] When the existing fixed-point divider performs divis...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F7/52
Inventor 刘衡竹华校专杨惠陈书明孙永节孙锁林胡封林余再祥罗恒吴虎成汪东
Owner NAT UNIV OF DEFENSE TECH
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