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Adaptation board, modifying method of double-station testing machine and testing method thereof

A testing machine and double-station technology, which is applied to measuring devices, components of electrical measuring instruments, and measuring electronics, can solve problems such as low testing efficiency, high testing cost, and long testing time, and achieve saving testing costs and saving the effect of time

Inactive Publication Date: 2011-03-30
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] In order to solve the problems of long test time, high measurement cost and low test efficiency of single-station testing machines in the prior art, the present invention provides a testing machine suitable for converting a single-station testing machine into a double-station testing machine. Matching board, double-station testing machine using the adapter board, testing method using the double-station testing machine, and method for refitting a single-station testing machine into a double-station testing machine using the adapter board

Method used

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  • Adaptation board, modifying method of double-station testing machine and testing method thereof
  • Adaptation board, modifying method of double-station testing machine and testing method thereof
  • Adaptation board, modifying method of double-station testing machine and testing method thereof

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Embodiment 1

[0038] This embodiment provides an adapter board capable of refitting a single-station testing machine into a double-station testing machine. The adapter board includes: a honeycomb board, a socket for fixing the relay assembly on the honeycomb board, and connecting board; the adapter board is connected to the pins of the relay assembly, so that the common pin of the relay assembly is connected to the single-station testing machine, and the first signal pin of the relay assembly is connected to the first chip to be tested. The test terminal and the second signal pin of the relay assembly are connected to the test terminal of the second chip to be tested, the first chip to be tested is located at the first station, and the second chip to be tested is located at the second station. bit.

[0039] figure 1 It is a structural schematic diagram of the adapter plate of the present invention. Such as figure 1 As shown, the adapter board includes: a honeycomb board 100, a socket (no...

Embodiment 2

[0048] This embodiment provides a method for converting a single-station testing machine into a double-station testing machine, including:

[0049] First, determine a single-station testing machine with dual-station testing hardware resources;

[0050] The single-station testing machine in this embodiment can be a Kejin testing machine on the market, its model is MTWT103, and the supporting probe station of the Kejin testing machine can be a UF170 model MTWP024, and the matching probe card The model can be P0009-02-02-S0;

[0051] Secondly, the program of the single-station testing machine is reset through the relay assembly, so that the first chip to be tested is tested when the relay is powered on, and the second chip to be tested is tested when the relay is not powered;

[0052] Figure 4 For duplex test flow chart, such as Figure 4 As shown, the idea of ​​resetting is: when the relay is not powered on, execute steps S11 and S12 in sequence, that is, test the first chip...

Embodiment 3

[0064] This embodiment provides a method for testing the chip under test by using the double-station testing machine described in Embodiment 2, including:

[0065] Firstly, placing the first chip to be tested and the second chip to be tested on the first station and the second station on the adapter board respectively;

[0066] Secondly, test the signal of the first chip under test and record;

[0067] Again, activate the second chip under test through a relay, test and record the signal of the second chip under test;

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Abstract

The invention provides an adaptation board, used for modifying a single-station testing machine into a double-station testing machine. The adaptation board comprises a cellular board, a socket fixing a relay assembly on the cellular board and an adapter plate; wherein the adapter plate is connected with the pin of the relay assembly, so that the public pin of the relay assembly is connected with the single-station testing machine, a first signal pin of the relay assembly is connected with the test terminal of a first chip to be tested, a second signal pin of the relay assembly is connected with the test terminal of a second chip to be tested, the first chip to be tested is arranged on a first station, and the second chip to be tested is arranged on a second station. The invention also provides a double-station testing machine applying the adaptation board, a testing method applying the double-station testing machine and a method for modifying single-station testing machine into double-station testing machine by utilizing the adaptation board. The invention solves the problems that testing efficiency is low and testing cost is high in the prior art.

Description

technical field [0001] The invention relates to the field of semiconductor testing, in particular to a refitting method and a testing method for an adapter board and a double-station testing machine. Background technique [0002] As the semiconductor testing industry continues to move forward, testing costs continue to increase. Traditional single-station testing no longer meets the needs of current testing, and multi-station testing has become an inevitable trend in test development. [0003] Multi-station testing can effectively shorten the number of times the probe station tray moves up and down, thereby shortening the test time, saving test costs and improving production efficiency. However, the price of the parallel multi-station testing machine is more expensive than that of the single-station testing machine. At present, the four COGENT testing machines used to test the power IC (Power IC) are all single-station testing machines, which undoubtedly causes A waste of ...

Claims

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Application Information

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IPC IPC(8): G01R1/02G01R31/00
Inventor 严大生岳青屈微微郭万瑾
Owner SEMICON MFG INT (SHANGHAI) CORP
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