Method for analyzing masks for photolithography

A technology of mask plate and lithography, which is applied in the field of analysis of mask plates used in lithography, and can solve problems such as complex evaluation
CN102007454AActive Publication Date: 2011-04-06CARL ZEISS SMT GMBH

Patent Information

Authority / Receiving Office
CN · China
Current Assignee / Owner
CARL ZEISS SMT GMBH
Publication Date
2011-04-06

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Abstract

The invention relates to a method for analyzing masks for photolithography. In this method, an aerial image of the mask for a first focus setting is generated and stored in an aerial image data record. The aerial image data record is transferred to an algorithm that simulates a photolithographic wafer exposure on the basis of this data record. In this case, the simulation is carried out for a plurality of mutually different energy doses. Then, at a predetermined height from the wafer surface, contours which separate regions with photoresist from those regions without photoresist are in each case determined. The result, that is to say the contours, are stored for each of the energy doses in each case in a contour data record with the energy dose as a parameter. Finally, the contour data records are combined to form a three-dimensional multicontour data record with the reciprocal of the energy dose as a third dimension, and, on the basis of the transitions from zero to values different than zero in the contours, a three-dimensional profile of the reciprocal of the energy dose depending on the position on the mask is generated. This profile, the so-called effective aerial image, is output or stored or automatically evaluated. The same can also occur with sections through said profile.
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Description

technical field

[0001] The present invention relates to a method of analyzing reticles for lithography, wherein lithographic wafer exposure is simulated. Background technique

[0002] The development trend in the production of semiconductor structures, such as those used in processors in computer technology and now more often also in exchangeable storage media, is towards the production of smaller structures in the same area. Currently available computer chips consist of about 30 different layers stacked one on top of the other, and the size of the functional structures, so-called features, is about 45 nm. The photolithographic masks used to fabricate these features must be fabricated with correspondingly high precision. In this case, the wafer is exposed up to thirty times, and a different mask is required for each layer.

[0003] Aerial image analysis, for example by means of the AIMS of Carl Zeiss SMS GmbH, has long been known and established for the analysis and final ...

Claims

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