Direct interface method of institute of electrical and electronic engineers (IEEE) 1394 bus and high-speed intelligent unified bus

A bus interface and bus technology, which is applied in the field of direct interface between IEEE1394 bus and high-speed intelligent unified bus, can solve the problems of difficult data interaction and unresolved IEEE1394 bus direct interface, etc., to achieve two-way data interaction, two-way reliable interconnection, The effect of avoiding bus conflicts

Inactive Publication Date: 2012-10-10
NORTHWESTERN POLYTECHNICAL UNIV
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Problems solved by technology

However, this method only realizes the one-way flow of data, and the maximum throughput of data is limited by the transmission speed of IEEE1394; in addition, this method only realizes the interface between the IEEE1394 bus and a few types of devices, when the IEEE1394 bus is connected to other bus forms It is still difficult to achieve data interaction due to the different transmission media and speed; therefore, the direct interface problem between the IEEE1394 bus and the high-speed intelligent unified bus is still not solved

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  • Direct interface method of institute of electrical and electronic engineers (IEEE) 1394 bus and high-speed intelligent unified bus
  • Direct interface method of institute of electrical and electronic engineers (IEEE) 1394 bus and high-speed intelligent unified bus
  • Direct interface method of institute of electrical and electronic engineers (IEEE) 1394 bus and high-speed intelligent unified bus

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Embodiment Construction

[0019] refer to Figure 1~6 , to describe the present invention in detail.

[0020] This embodiment is an interface method between the IEEE1394 bus and the intelligent bus, which realizes the functions of the IEEE1394 equipment performing high-speed optical fiber transmission through the high-speed intelligent bus and high-speed optical fiber data receiving based on the low-speed IEEE1394 bus. The hardware structure of this embodiment includes an IEEE1394 controller, an intelligent bus controller, a central bus arbitration controller and a high-speed mass memory.

[0021] In this embodiment, the scheduling and interface control of the two buses are mainly completed in the high-speed logic array FPGA, and the FPGA adopts the EP1C12 chip of the Cyclone series of Altera Corporation of the United States. The chip has a density of 12060 LE units, which can fully meet the needs of image processing algorithms and system logic control; 169 user-available I / O ports meet the system's m...

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Abstract

The invention discloses a direct interface method of an electrical and electronic engineers (IEEE) 1394 bus and a high-speed intelligent unified bus, which is used for solving the technical problem of low interconnection rate between the existing IEEE 1394 bus and other buses. The technical scheme of the direct interface method is as follows: an IEEE 1394 bus controller is designed to realize analysis of an IEEE 1394 bus protocol, thus correctly and completely receiving valid data on the IEEE 1394 bus; a high-speed transceiver SerDes uses a fiber channel (FC) to realize high-speed transceiving of the data on the intelligent bus; a high-speed cache memory is used to realize buffer storage for bidirectional data; and a clock control module is used to realize clock switching for the buses with different rates so as to realize high-speed, reliable and effective transmission for two types of bus data.

Description

technical field [0001] The invention relates to a bus interface method, in particular to a direct interface method between an IEEE1394 bus and a high-speed intelligent unified bus. Background technique [0002] IEEE1394 is a high-speed serial bus standard, the standard cable mode supports 100Mb / s, 200Mb / s, 400Mb / s transmission rate, plug and play, supports hot plug and its transmission speed can be upgraded to 3.2 Gb / s. IEEE1394 has nothing to do with the platform and is widely used in video transmission, computer peripherals and Internet connection and other fields. With the development of avionics systems, the integration scale of the system is getting larger and larger, and the division of labor and cooperation of each subsystem is mainly reflected in the bus interface communication and functional calculation, thus requiring massive sensor information and image information to be realized through the high-speed intelligent unified bus. The high-speed sharing of high-spee...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F13/38
Inventor 史忠科王闯辛琪
Owner NORTHWESTERN POLYTECHNICAL UNIV
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