Double-sided alignment apparatus and alignment method thereof

Abstract

The invention provides a double-sided alignment apparatus and an alignment method thereof. The apparatus comprises a mask alignment device, a front surface alignment device of a silicon chip and a back surface alignment device of the silicon chip. The mask alignment device comprises a mask lamp optical system, a mask imaging optical system and an image sensor, and realizes the alignment of mask marks; the front surface alignment device of the silicon chip comprises the mask lamp optical system, the mask imaging optical system and an image sensor, and realizes the alignment of front surface marks of the silicon chip and reference marks of a working platform by means of a projection objective; and the back surface alignment device of the silicon chip comprises a bottom lamp optical system, a bottom imaging optical system, the mask imaging optical system and the image sensor, and realizes the alignment of back surface marks of the silicon chip by virtue of the projection objective. The double-sided alignment device and the alignment method thereof are used to reduce the design cost and the complexity of a double-sided alignment system.

Description

Technical field [0001] The present invention relates to an alignment device and method, and more particularly to a double-sided alignment device and alignment method. Background technique [0002] In order to achieve the development requirements of intelligent and miniaturized packaging devices, there is a need for multi-chip (silicon) packaging solutions. Multi-chip packaging is a silicon chip-level packaging method in which two or more planar devices are stacked and connected. The packaging method is also called three-dimensional (3D) packaging. In 3D packaging, the TSV packaging process is considered to be one of the most promising and promising 3D packaging methods in the future. The TSV packaging process method is to form micro-vias from the front to the back of the semiconductor wafer, and then electrically connect the upper and lower wafers. Due to the 3D vertical interconnection method, the length of the interconnection leads between the wafers is greatly shortened, so t...

AI Technical Summary

Problems solved by technology

[0005] Compared with using the coaxial alignment method to align the rear surface of the silicon wafer, a complete set of off-axis alignment system is added, including marking illumination, imaging optical system, and imaging sensor, which increases the complexity and cost of system design, and also increases The difficulty of testing and calibrating the whole machine

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