I/O (input/output) unit and integrated circuit chip
An integrated circuit and circuit technology, applied in the direction of circuit devices, emergency protection circuit devices, emergency protection circuit devices for limiting overcurrent/overvoltage, etc., can solve the problem of large I/O unit area, large integrated circuit chip area, It can solve problems such as small layout and wiring area, so as to reduce the difficulty and reduce the area
Active Publication Date: 2013-09-18
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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Problems solved by technology
[0006] The invention solves the problem in the prior art that the area of the I / O unit containing the electrostatic discharge protection circuit is relatively large, so that the layoutable area of the core circuit area in the integrated circuit chip is small and the area of the integrated circuit chip is large
Method used
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[0015] refer to image 3 As shown, an embodiment of the I / O unit of the present invention includes: N-type electrostatic discharge protection circuit 200, P-type electrostatic discharge protection circuit 300, pad 100 (dotted line frame range) and I / O logic circuit 400, wherein N Type ESD protection circuit 200 and P-type ESD protection circuit 300 are laterally adjacent, pad 100 covers part of N-type ESD protection circuit 200 and P-type ESD protection circuit 300, I / O logic circuit 400 and pad 100, The laminated structure formed by the N-type ESD protection circuit 200 and the P-type ESD protection circuit 300 is vertically adjacent. The connection mode between the ground wire 500 and the N-type electrostatic discharge protection circuit 200 and the connection mode between the power line 600 and the P-type electrostatic discharge protection circuit 300 can be image 3 The shown ground wire 500 and power wire 600 both cover part of the N-type electrostatic discharge protecti...
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The invention provides an I / O (input / output) unit and an integrated circuit chip. The I / O unit comprises an N-type electrostatic discharge protection circuit, a P-type electrostatic discharge protection circuit, a pad and an I / O logic circuit, wherein the N-type electrostatic discharge protection circuit and the P-type electrostatic discharge protection circuit are transversely adjacent; the pad covers part of the N-type electrostatic discharge protection circuit and part of the P-type electrostatic discharge protection circuit; the I / O logic circuit and a laminated structure formed by the pad, the N-type electrostatic discharge protection circuit and the P-type electrostatic discharge protection circuit are longitudinally adjacent; the N-type electrostatic discharge protection circuit is connected with an earth wire; and the P-type electrostatic discharge protection circuit is connected with a power wire. The I / O unit and the integrated circuit chip have the following advantages: the area of the I / O unit is smaller; correspondingly, a bigger area for placement and routing is provided to the core circuit region of the integrated circuit chip, thus reducing the difficulty of placement and routing of the core circuit region; and under the condition of a definite core circuit area, the integrated circuit chip comprising the I / O unit has a smaller area.
Description
technical field [0001] The invention relates to the field of semiconductor integrated circuit design, in particular to an I / O unit and an integrated circuit chip. Background technique [0002] As the functions of semiconductor devices become increasingly complex and their sizes decrease, the upper limit of the electrostatic discharge (ESD, Electro Static Discharge) voltage that they can withstand is also decreasing. Therefore, in the design of semiconductor integrated circuits, various electrostatic discharge protection designs are often used to protect the semiconductor devices inside the integrated circuit chip. [0003] At present, a commonly used electrostatic discharge protection design is to integrate an electrostatic discharge protection circuit in an input / output (I / O) unit of an integrated circuit chip, and to solder the electrostatic discharge protection circuit to the corresponding I / O unit. Disk (PAD) connected. figure 1 It is a structural schematic diagram of ...
Claims
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IPC IPC(8): H02H9/00
Inventor 单毅
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP