DC offset cancellation circuit
A technology for eliminating circuit and DC offset, applied in the direction of DC level restoration device/bias distortion correction, baseband system components, etc. layout area, improve integration, eliminate the effect of DC offset
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[0011] The present invention will be further described below in conjunction with the drawings and specific embodiments.
[0012] Such as figure 1 As shown, a DC offset cancellation circuit includes a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a first feedback capacitor C1, a second feedback capacitor C2, a first voltage control signal port VC1, second voltage control signal port VC2, signal input positive terminal Vip, signal input negative terminal Vin, signal output positive terminal Vop, signal output negative terminal Von and operational amplifier Op-amp, wherein the drain of the first transistor M1 is connected to The signal input positive terminal Vip is connected, the source of the first transistor M1 is connected to the positive input terminal ip of the operational amplifier Op-amp; the drain of the second transistor M2 is connected to the signal input negative terminal Vin, and the second transistor The source of M2 is co...
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