Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Pin multiplexing verifying device and method for integrated circuit

A pin multiplexing and integrated circuit technology, which is applied in the field of pin multiplexing verification devices, can solve problems such as omissions by verification engineers and errors not being discovered in time, so as to avoid tedious work, reduce test time, and reduce errors. The effect of chance

Active Publication Date: 2011-08-31
WUXI ZGMICRO ELECTRONICS CO LTD
View PDF5 Cites 4 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Doing so will take a lot of time and energy, and because the design code of the pin reuse part will be frequently modified, it is often easy to cause omissions by verification engineers, resulting in some errors not being discovered in time

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Pin multiplexing verifying device and method for integrated circuit
  • Pin multiplexing verifying device and method for integrated circuit
  • Pin multiplexing verifying device and method for integrated circuit

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0034] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention more clear, specific embodiments will be described in detail below with reference to the accompanying drawings.

[0035] figure 1 The structural diagram of the verification device provided for the embodiment of the present invention, as shown in the figure, the verification device for multiplexing the pins of the integrated circuit includes:

[0036] A record storage module 110, configured to: store a data table of each pin information;

[0037] The generating module 120 is configured to: generate a test vector by parsing the script of the data table; the test vector includes the stimulus verification value of the configurable pin signal and the expected verification value of the non-configurable pin signal;

[0038] The test module 130 is configured to: set the configurable pin signal as the excitation verification value, obtain the actual measurement value of ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a pin multiplexing verifying device and method for an integrated circuit. The verifying device comprises a recoding and storing module, a generating module and a testing module, wherein the recording and storing module is used for storing each pin information data table, the generating module is used for generating test vectors by analyzing the scripts of the data tables, and the test vectors include an excitation verifying value of a configurable pin signal and an expected verifying value of an in-configurable pin signal, the testing module is used for setting the configurable pin signal to be the excitation verifying value to obtain an actual measured value of the in-configurable pin signal, and the actual measured value is compared with the expected verifying value to obtain a verification result. By adopting the pin multiplexing verifying device and method, the error possibility of pin multiplexing can be reduced, safety can be improved, and time and cost can be saved.

Description

technical field [0001] The invention relates to the field of integrated circuits, in particular to a verification device and verification method for pin multiplexing of integrated circuits. Background technique [0002] In the design and verification of large-scale integrated circuits, the verification of pin reuse has always been a very important and very cumbersome work. The current practice is generally that the pin reuse design engineer writes the pin reuse into a document (usually a spreadsheet), and then the verification engineer writes the test vector and verifies it on the simulation verification platform. Doing so will take a lot of time and energy, and because the design code of the pin reuse part will be frequently modified, it is often easy to cause omissions by verification engineers, resulting in some errors not being discovered in time. Contents of the invention [0003] The object of the present invention is to provide a verification device and verificatio...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/28
Inventor 李树杰
Owner WUXI ZGMICRO ELECTRONICS CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products