A three-dimensional highly integrated system-in-package structure

Abstract

The invention relates to a three-dimensional high-integration level system-in-package structure, which comprises a line finishing wafer, at least a group of flip-chip package layers positioned on the line finishing wafer, at least a group of wiring package layers positioned on the flip-chip package layers, a top flip-chip package layer positioned on the wiring package layer of the last group, and connection balls arranged below the line finishing wafer. Compared with the prior art, the three-dimensional high-integration level system-in-package structure provided by the invention can form a finally packaged product comprising the whole system functions rather than a single chip function, reduces in-system resistance, in-system inductance and interference factors among chips, and in addition, can form a more complex multi-layer interconnected structure to realize wafer system-in-package of a higher integration level.

Description

technical field [0001] The invention relates to semiconductor technology, in particular to a three-dimensional highly integrated system-in-package structure. Background technique [0002] With the continuous development of integrated circuit technology, electronic products are increasingly developing in the direction of miniaturization, intelligence, high performance and high reliability. The integrated circuit packaging not only directly affects the performance of integrated circuits, electronic modules and even the whole machine, but also restricts the miniaturization, low cost and reliability of the entire electronic system. With the gradual reduction of the size of the integrated circuit chip and the continuous improvement of the integration level, the electronic industry has put forward higher and higher requirements for the integrated circuit packaging technology. [0003] In the Chinese patent whose notification number is CN1747156C, a kind of packaging circuit arran...

AI Technical Summary

Problems solved by technology

[0004] The final product packaged and manufactured according to the above method has only a single chip function. However, with the trend of semiconductor products becoming thinner and smaller and the demand for product system functions constantly improving, how to further improve the integration of system-in-package has become an urgent need for those skilled in the art. solved problem

Images