High-performance adaptive binary arithmetic encoder

An adaptive binary and arithmetic encoder technology, applied in the field of video processing, can solve the problems of increasing hardware resource consumption, complex encoder structure, etc., to achieve the effect of improving the degree of parallelism and encoding speed, and solving the conflict of memory read and write

Inactive Publication Date: 2011-09-07
XIDIAN UNIV
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Problems solved by technology

This structure can realize the encoding speed of encoding 2 bits of data in one clock cycle, but the encoder structure is too complicated and increases the consumption of hardware resources

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  • High-performance adaptive binary arithmetic encoder
  • High-performance adaptive binary arithmetic encoder
  • High-performance adaptive binary arithmetic encoder

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Embodiment Construction

[0025] The present invention will be described in further detail below in conjunction with the accompanying drawings and embodiments.

[0026] refer to figure 1 , the self-adaptive binary arithmetic coder of the present invention includes: a probability model storage module, a probability model update module, a coding state update module, a normalization module and a register group. A first register set is inserted between the probability model storage module and the probability model update module, and a second register set is inserted between the encoding state update module and the normalization module, forming a three-stage pipeline structure. The probability model storage module is located at the first stage of the pipeline structure. This module first generates the read address of the probability model, and then reads the probability model required for binary arithmetic coding from the probability model memory; the read probability model passes through the first register...

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Abstract

The invention discloses a high-performance adaptive binary arithmetic encoder which mainly solves the problems of low encoding speed and complicated structure of the existing binary arithmetic encoder. The encoder comprises a probability model storing module, a probability model updating module, an encoding state updating module, a normalization module and register groups, wherein a first register group is inserted between the probability model storing module and the probability model updating module, and a second register group is inserted between the encoding state updating module and the normalization module so as to form a three-level flow structure to improve the encoding speed by sufficiently using the parallelism of hardware; a caching register unit is adopted in the probability model storing module so that the read / write conflict of a probability model memory is effectively avoided; and a prefix zero detection unit is adopted in the normalization module so that the structure of the normalization module is simple and easy to implement with hardware. The high-performance adaptive binary arithmetic encoder disclosed by the invention has the characteristics of high encoding speed and simple structure, and can be applied to the real-time encoding of high-definition videos.

Description

technical field [0001] The invention belongs to the technical field of video processing, relates to an arithmetic coder structure, and can be used in VLSI design. Background technique [0002] The future society will be an information society. Digitized information, especially digitized video and audio information, has the characteristics of massive data, which causes great difficulties in the storage and transmission of information, and becomes one of the bottlenecks that hinder human beings from obtaining and using effective information. Video information has a series of advantages, such as intuition, certainty, high efficiency, extensiveness, etc., but the amount of information is too large. To make the video be effectively applied, the problems of encoding compression ratio and decoding image quality must be solved. These two are two contradictory aspects. Therefore, it will be the best choice to research and develop new and effective multimedia data compression codin...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04N7/26H04N19/13
Inventor 宋锐李云松崔弘飞贾媛王养利吴成柯李宏伟肖嵩杜建超裘陆君韩晶晶刘翔孙铭若
Owner XIDIAN UNIV
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