A kind of FPGA-based at96 bus controller ip core and its construction method
A bus controller and construction method technology, applied in the direction of instrumentation, electrical digital data processing, etc., can solve the problems of low application efficiency, cumbersome configuration operations, poor portability, etc., to reduce application costs, simple configuration operations, and reduce CPU The effect of the load
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[0048] figure 2 Shown is a block diagram of the functional module structure of the AT96 bus controller IP core based on FPGA. An embodiment of the present invention is described by taking a bus read and write access through the AT96 bus controller as an example.
[0049] 1, a kind of AT96 bus controller IP core based on FPGA of the present invention, as figure 2 As shown, it is composed of AT96 bus interface module (001), AT96 bus controller state machine module (002), FIFO cache module (003), local bus control module (004), local bus interface module (005) and functional configuration Module (006) consists of, such as figure 2 As shown, the position connection relationship and signal flow among them are as follows. a) One end of the AT96 bus interface module (001) is connected to the AT96 bus interface card, and the other end is connected to the AT96 bus controller state machine module (002), which receives data and control signals from the AT96 bus or sends data and contr...
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