Power mos tube and its manufacturing method

Abstract

The present invention relates to a power MOS transistor and a manufacturing method thereof. The power MOS transistor includes a drain region, a body region formed on the drain region, and a U-shaped gate trench arranged in the body region and the drain region. The gate oxide layer on the sidewall and bottom of the U-shaped gate trench fills the gate formed by the U-shaped gate trench, and is arranged on both sides of the U-shaped gate trench, the body In the source region below the surface of the region, a floating ring is provided in the drain region, adjacent to the bottom of the U-shaped gate trench, and the surface of the gate oxide layer at the bottom of the U-shaped gate trench is approximately V-shaped, The bottom end face of the gate is a V-shaped end face. The power MOS tube and the manufacturing method thereof of the present invention make the electric field on the side wall of the U-shaped trench evenly distributed by setting the V-shaped oxide layer at the bottom of the U-shaped gate trench and the floating ring in the drain region, thereby improving the power MOS tube. breakdown voltage.

Description

technical field [0001] The invention relates to a semiconductor manufacturing process, in particular to a power MOS tube and a manufacturing method thereof. Background technique [0002] figure 1 Shown is a cross-sectional view of a power MOS transistor in the prior art. The power MOS transistor includes: a drain region 101, a body region 102 formed on the drain region 101, and a U-shaped gate trench 103, a U-shaped gate oxide layer 104 disposed on the sidewall and bottom of the U-shaped gate trench 103, filling the U-shaped gate 105 formed by the U-shaped gate trench 103, and a source region 106 disposed on both sides of the U-shaped gate trench 103 and below the surface of the body region 102 . [0003] figure 2 Shown is the manufacturing flowchart of the above-mentioned power MOS tube, and the manufacturing method of the power MOS tube in the prior art includes the following steps: [0004] Step S101, providing a heavily doped semiconductor substrate, forming an epit...

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Problems solved by technology

[0015] As mentioned above, in the prior art power MOS tube, the surface closest to the U-shaped gate 105 and the drain region 101 is the bottom end surface of the entire U-shaped gate 105, because the U-shaped gate 105 The gate oxide layer on the bottom surface of the U-shaped trench is thinner. When a high voltage is applied to the substrate, the electric force lines at the bottom of the U-shaped trench are the densest, so the electric field is the strongest at the bottom of the U-shaped trench, making it easy for the power MOS transistor to be placed in the U-shaped trench. Avalanche breakdown occurs at the bottom of the slot, resulting in a small breakdown voltage

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