Semiconductor device

Abstract

The invention provides a semiconductor device, which comprises a substrate having shallow trench isolation and source / drain regions located therein, a gate stack located on the substrate between the source / drain regions, a first gate spacer on the sidewall of the gate stack, and a second gate spacer on the sidewall of the first gate spacer. The dielectric constant of the first gate spacer is smaller than the dielectric constant of the second gate spacer. The dielectric constant of gate spacers, that is the capacitive coupling between the LDD regions and the gate, is reduced.

Description

technical field [0001] The invention relates to a semiconductor device, in particular to a semiconductor device for reducing the capacitive coupling effect between a gate and a lightly doped source / drain (LDD) region. Background technique [0002] The integrated circuit (IC) industry has experienced rapid growth. Technological advances in integrated circuit (IC) materials and design have resulted in each IC generation having smaller and more complex circuits than the previous generation. However, these developments increase the complexity of integrated circuit processes and manufacturing methods, and in order to realize these technological developments, simpler integrated circuit processes and manufacturing methods need to be developed. [0003] During the development of integrated circuits, when the geometric size (that is, the smallest component (or line width) that can be manufactured by a process) shrinks, the functional density (functional density) (that is, the number...

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Problems solved by technology

This fringe capacitive coupling effect degrades the performance of transistors applied to alternating current (AC)

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