Safe and reusable single program initiation (SPI) peripheral interface circuit

Abstract

The invention discloses a safe and reusable single program initiation (SPI) peripheral interface circuit. The circuit comprises a data buffer, an interruption and direct memory access (DMA) control module, a register control module, an advanced peripheral bus (APB) Slave interface module, a clock fractional frequency module, a command resolving module and a safe transmission module, wherein the data buffer is used for buffering receive data (RXD) and transmit data (TXD); the interruption and DMA control module is used for supporting two different types of data processing modes, namely an interruption mode and a DMA mode; the register control module is used for allocating sequential control between a register and modules; the APB Slave interface module is used for interacting with a central processing unit (CPU) based on an APB; the clock fractional frequency module is used for generating 2-256 random fractional frequency clocks to an external device to realize flexible allocation of baud rate; the command resolving module is used for resolving a command from a host machine when working mode of an interface circuit is in a slave mode; and the safe transmission module is used for transforming transmission data from series connection to parallel connection and vice versa and guaranteeing data transmission safety by virtue of a cyclic redundancy check (CRC) algorithm and an automatic repeat request (ARQ) technology. The safe and reusable SPI peripheral interface circuit supports switch between a major mode and a slave mode, and guarantees the data transmission safety.

Description

technical field [0001] The invention relates to a peripheral serial bus SPI interface, in particular to a safe and reusable SPI peripheral interface circuit. Background technique [0002] The serial peripheral interface (Serial Peripheral Interface, SPI) bus was originally launched by Motorola, and was later handed over to the OPENCORES organization for maintenance. The SPI bus is a full-duplex, synchronous, serial data interface standard bus with two working modes, Master and Slave. Compared with other serial buses, it has the advantages of simple circuit structure (only four interface lines), fast speed, etc. It has been widely used in the rapid development of integrated circuits in recent years. A large number of new devices such as LCD modules, FLASH, EEPROM memories, data input and output devices, etc. have adopted the SPI interface. However, when the SPI interface is working, there is no response signal, and there is no parity bit when the data is sent. Therefore, th...

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Problems solved by technology

But when the SPI interface is working, there is no response signal, and there is no parity bit when the data is sent, so the master and slave devices must fully meet the timing requirements of SPI, otherwise data transmission is prone to errors

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