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Method and device for testing chip

A chip testing and testing vector technology, applied in electronic circuit testing and other directions, can solve the problems of time-consuming and resource-consuming and low testing efficiency of source files, and achieve the effect of reducing production time, memory consumption, and development cycle.

Active Publication Date: 2011-11-09
WUXI ZGMICRO ELECTRONICS CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] The purpose of the present invention is to provide a method and device for chip testing, which can save ATE resources and improve test efficiency, and solve the technical problems that the prior art test vector source files consume a lot of time and resources, and the test efficiency is low

Method used

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  • Method and device for testing chip
  • Method and device for testing chip

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Embodiment Construction

[0038] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention more clear, specific embodiments will be described in detail below with reference to the accompanying drawings.

[0039] figure 1 The flow chart of the steps of the method provided by the embodiment of the present invention; as shown in the figure, the embodiment of the present invention provides a chip testing method for automatic test equipment, which includes the following steps:

[0040] Step 101, read the test vector source file in the memory of the automatic test equipment, and display the list of pin description information in the test vector source file;

[0041] Step 102, delete the pin description information that has no actual input or output in the list through the deletion module of the source file editor;

[0042] Step 103, save the modified test vector source file, and run the modified test vector source file through the automatic test equipment t...

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Abstract

The invention provides a method and a device for testing a chip. The method is used for automatic test equipment (ATE) and comprises the following steps of: reading a test vector source file in a memory of the ATE, and displaying a list of pin description information in the test vector source file; deleting pin description information, which is not actually input or output, in the list by using a deletion module of a source file editor; storing the modified test vector source file; and operating the modified test vector source file by using the ATE to test the chip, so that resources occupied by the pin description information which is not actually actual input or output in the test are saved. By the method and the device, the resources of the ATE can be saved, test efficiency is improved, and the technical problems that the test vector source file consumes a large quantity of time and resources and the test efficiency is low in the prior art are solved.

Description

technical field [0001] The invention relates to automatic testing equipment for chips, in particular to a chip testing method and device. Background technique [0002] ATE (Automatic Test Equipment, automatic test equipment), is a device, circuit board and chip testing equipment controlled by a computer. It replaces manual labor through computer programming and automatically completes the test sequence. [0003] ATE can be divided into the following types: digital test system, linear device test system, analog test system, memory test system, board test system, mixed signal test system, SOC (System on Chip, integrating a complete system in a chip ) test system. [0004] The development of ATE is from simple devices, low pin count, low speed test system (10MHz, 64pins) to medium pin count, medium speed test system (40MHz, 256pins) to high pin count, high speed (over 100MHz, 1024pins) and Finally transitioned to the current SoC test system (1024pin, over 400MHz, and has sim...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/28
Inventor 胡伟锋
Owner WUXI ZGMICRO ELECTRONICS CO LTD
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