PN junction isolating structure and forming method thereof

Abstract

The invention provides a PN junction isolating structure and a forming method thereof. The PN junction isolating structure comprises a P type substrate, an N type epitaxial layer, a groove and a P type semiconductor layer, wherein the N type epitaxial layer is positioned on the P type substrate; the groove passes through the N type epitaxial layer; the P type substrate is exposed out of the bottom of the groove; and the P type semiconductor layer is filled in the groove. The PN junction isolating structure contributes to reducing the occupied chip area, and has a simple process and high operability.

Description

technical field [0001] The invention relates to the technical field of semiconductor devices and semiconductor processes, in particular to a PN junction isolation structure and a forming method thereof. Background technique [0002] The PN junction isolation structure is an isolation structure widely used in semiconductor technology, and is mainly used in the manufacturing process of bipolar integrated circuits. figure 1 A PN junction isolation structure in the prior art is shown, mainly comprising: a P-type substrate 101; an antimony buried layer 102 formed on the P-type substrate 101; an N-type epitaxial layer 104; And the lower isolation region 103 in the N-type epitaxial layer 104; the upper isolation region 105 in the N-type epitaxial layer 104, the upper isolation region 105 and the lower isolation region 103 are connected up and down, and the doping type of both is P type. A PN junction is formed between the P-type doped upper isolation region 105 and the lower isola...

AI Technical Summary

Problems solved by technology

[0004] However, in order to enable the upper and lower isolation regions 105 and the lower isolation region 103 to be butted up and down after being diffused, long-term high-temperature annealing is required, and while the upper and lower isolation regions 105 and the lower isolation region 103 are diffused, severe lateral diffusion will also occur. causing it to occupy a large amount of chip area

Images