Unlock instant, AI-driven research and patent intelligence for your innovation.

Method for lowering DDR3 (Double Data Rate) memory refreshing power consumption

A memory and power consumption technology, applied in the field of DDR3 memory controller design, can solve the problems of low reliability, high cost, loss of memory data, etc., and achieve the effect of reducing the power consumption of the whole machine, reducing power consumption, and reducing power consumption

Inactive Publication Date: 2012-04-25
DAWNING INFORMATION IND BEIJING
View PDF4 Cites 1 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In order to solve the problems of possible loss of memory data, low reliability and high cost during CPU reset in the prior art, the present invention provides a method for preventing memory data loss, including the following steps: when the CPU resets, delay the reset time and Put the memory into a self-refresh state; end the delay and trigger a true CPU reset

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Method for lowering DDR3 (Double Data Rate) memory refreshing power consumption
  • Method for lowering DDR3 (Double Data Rate) memory refreshing power consumption

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0016] The present invention adopts the method of refresh peak staggered superimposition to reduce the power consumption brought by SDRAM particle refresh, thereby reducing the power consumption of memory operation. The diagram is attached figure 1 shown. If there are three chip select CSs in the current memory controller that need to be refreshed, when the specified refresh time arrives, as shown in the first clock cycle in the figure, a refresh command is issued to select the first chip select CS0 and refresh in CS0 The cycle is not over. After CS0 starts to refresh for 5 cycles, issue the second refresh command and select the second chip selection CS1. Also after 5 cycles of CS1 strobe refresh, issue the third refresh command and select the third chip at the same time. A chip select CS2, because the memory type is the same, under the premise that the refresh cycle of CS2 is satisfied, the refresh cycle of CS0 and CS1 must also be satisfied. Under normal circumstances, aft...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a method for lowering DDR3 (Double Data Rate) memory refreshing power consumption, which is used for lowering power consumption brought about by memory particle refreshing with a refreshing staggered-peak overlaying method so as to lower memory operation power consumption. With the method for lowering DDR3 memory refreshing power consumption, which is disclosed by the invention, the refreshing current and the refreshing power consumption of an SDRAM (Synchronous Dynamic Random Access Memory) particle can be effectively lowered. In a large-volume and multi-memory system, the method has an especially obvious effect on lowering power consumption, and the complete machine power consumption of the system can be effectively lowered.

Description

technical field [0001] The invention belongs to the design field of DDR3 memory controllers, and in particular relates to a method for reducing power consumption of DDR3 memory refresh. Background technique [0002] Since SDRAM particles need to be refreshed regularly to ensure that the memory data is not lost, within the specified time, SDRAM particles must complete the corresponding refresh operation. The current of SDRAM particles is relatively large during refresh, and the refresh cycle is long. Compared with other operations, due to the large power consumption brought by the refresh operation, the existing technology generally completes the refresh within the specified time according to the refresh requirements in accordance with the JEDEC specification. operate. [0003] Patent No. CN201010598447.5 (a new method for refreshing SDRAM realized by FPGA) discloses a new method for refreshing SDRAM memory particles realized by FPGA. There are N chip selection CSs in the me...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): G11C11/406
Inventor 李静刘朝辉窦晓光张磊白宗元纪奎
Owner DAWNING INFORMATION IND BEIJING
Features
  • R&D
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2025 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com