Data read-write method and storage device

Abstract

The invention discloses a data read-write method and a storage device, which belongs to the field of memories. The method includes determining capacity specifications of a single-port memory, a main memory look-up table and a standby memory look-up table according to the capacity specifications M*W of a false dual-port / dual-port memory to be achieved and the quantity N+1 of the single-port memory, using M / N number of storage units as units, enabling the storage units corresponding to each unit in the main memory look-up table and the standby memory look-up table to be initialized to different values so as to be used for indicating different single-port memories respectively, reading data from an effective single-port memory indicated by a reading address of the main memory look-up table when reading operation and writing operation exist simultaneously and corresponding values of the reading address and a writing address in the main memory look-up table are same, writing data in a standby single-port memory indicated by the writing address of the standby memory look-up table, and identifying the single-port memory where effective data and idle data of the writing address exist. By means of the scheme, an area of the memories is reduced greatly.

Description

technical field [0001] The invention relates to the field of memory, in particular to a data reading and writing method and a storage device. Background technique [0002] Memories, such as SRAM (Static Random Access Memory, static random access memory), eDRAM (Enhanced Dynamic Random Access Memory, enhanced dynamic random access memory), etc., are often used in the ASIC (Application Specific Integrated Circuit, application specific integrated circuit) design process. According to the requirements of access bandwidth, the memory can be divided into single-port / pseudo-dual-port / dual-port / quad-port memory. Under the same capacity specification, the access bandwidth of the pseudo dual-port / dual-port memory is twice that of the single-port memory, but the area of ​​the pseudo-dual-port / dual-port memory is more than twice that of the single-port memory. [0003] In order to reduce the area of ​​the memory, two single-port memories with the same specifications as the pseudo-dual-...

AI Technical Summary

Problems solved by technology

[0004] The inventors have found that, under the same access bandwidth, the area of ​​two single-port memories is limited compared with the pseudo-dual-port / dual-port memories of the same capacity specification, and how to reduce the area of ​​the memory more significantly, the prior art still has no corresponding solution

Images