Microprocessor order split device based on implicit relevance and implicit bypass

A microprocessor and instruction splitting technology, applied to identification devices, instruments, etc., can solve the problems of consuming large hardware resources, limiting processor performance, and limiting the range of splittable instructions, so as to expand the type and scope, reduce the Programming complexity, the effect of increasing code density

Active Publication Date: 2012-05-02
C SKY MICROSYST CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] In order to overcome the disadvantages that existing microprocessors need to consume a large amount of hardware resources, limit the range of detachable instructions, and limit the performance of processors when splitting complex operation instructions with front and rear data dependencies, the present invention provid

Method used

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  • Microprocessor order split device based on implicit relevance and implicit bypass
  • Microprocessor order split device based on implicit relevance and implicit bypass
  • Microprocessor order split device based on implicit relevance and implicit bypass

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Embodiment Construction

[0023] The present invention will be further described below in conjunction with the accompanying drawings.

[0024] refer to Figure 1 ~ Figure 3 , a microprocessor instruction splitting device based on implicit dependencies and implicit bypasses, which splits a decoded single complex operation instruction that the microprocessor cannot process individually at one time into several To process atomic instructions, the microprocessor instruction splitting means includes:

[0025] The instruction to be split detection and split unit is used to judge whether the decoded instruction entering the instruction splitting device of the microprocessor is an instruction to be split, and split the instruction to be split into at least two atomic instructions, yes an input to the microprocessor instruction splitting device based on implicit dependency and implicit bypass techniques; and

[0026] The split instruction processing unit is connected to the output end of the instruction split...

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PUM

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Abstract

The invention discloses a microprocessor order split device based on implicit relevance and an implicit bypass, comprising a detecting and splitting unit required to split order, which is used for judging whether the coded order entering the microprocessor order split device is the order required to split and splitting the order required to split into two atom orders; a split order processing unit, which is used for receiving at least two atom orders split from the order required to split by the split unit required to split order, structuring the implicit relevance for these atom orders and outputting the processed atom order; the other processing unit, which is used for receiving the order judged to not require to split by the detecting and processing unit of the order required to split and the atom order finally generated by the split order processing unit, finishing the order subsequent process and executing work. When the complex operation order with front and rear data relevance is split, the invention can effectively reduce the occupied hardware resource, expand the range of the order to be split and improve the performance of the processor.

Description

Technical field: [0001] The invention relates to the field of embedded processors, in particular to a microprocessor instruction splitting device based on implicit correlation and implicit bypass. Background technique: [0002] The development of modern integrated circuit technology and the continuous deepening and expansion of the application field of embedded microprocessors make memory an important factor restricting the cost and power consumption of microprocessors. Under the premise of specific hardware resources, how to enhance the function of the instruction set, improve code density and instruction execution efficiency is a problem that many processor designers must face. For specific applications, many embedded processors propose a solution to this problem by introducing several complex operation instructions into the instruction set that can be split into several atomic operations during execution. Considering the implementation complexity of processor hardware re...

Claims

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Application Information

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IPC IPC(8): G09F9/30
Inventor 丁永林李战辉杨军
Owner C SKY MICROSYST CO LTD
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