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Fault injection method based on dual-port SRAM (system random access memory)

A fault injection and dual-port technology, applied in static memory, instruments, etc., can solve the problems of high hardware overhead and achieve the effect of simple test operation, low cost, and reduced test power consumption

Inactive Publication Date: 2012-05-09
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

But in this way, the hardware overhead is relatively large, and it will bring a lot of extra power consumption

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  • Fault injection method based on dual-port SRAM (system random access memory)
  • Fault injection method based on dual-port SRAM (system random access memory)

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Embodiment Construction

[0017] In order to make the objectives, technical solutions and advantages of the present invention clearer, the present invention will be further described in detail below with reference to specific embodiments and accompanying drawings.

[0018] The principle and features of the present invention are described below by taking a dual-port SRAM based on the Hamming code encoding and decoding technology as an example in conjunction with the accompanying drawings. The examples are only used to explain the present invention, but not to limit the scope of the present invention.

[0019] The fault injection method based on dual-port SRAM provided by the present invention is to set a code selector behind the original encoder of each port. The output ends of the s are connected to the encoding storage units of the respective ports. The code selectors are all controlled by the external control signal TEST. When the TEST signal is low, the SRAM enters the normal working mode, and the ...

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Abstract

The invention discloses a fault injection method based on dual-port SRAM (system random access memory), which comprises the following steps:A arranging a first code selector behind a coder of a first port of the SRAM; arranging a second code selector behind a coder of a second port; and globally applying an external control signal TEST to the first code selector and the second code selector of the SRAM. The in-chip fault injection method disclosed by the invention can implement control by one control signal outside the chip without introducing any other external injection signal, only occupies small internal chip area, and can quickly implement the fault injection test. Meanwhile, since the method is only logically equivalent fault injection instead of direct error injection, thereby lowering the test power consumption. Besides, the test operation is simple and quick, and the method has the advantages of low cost and high test coverage rate.

Description

technical field [0001] The invention relates to the technical field of static random access memory (SRAM), and in particular, to a fault injection method for dual-port SRAM, which is used for designing a reinforced SRAM by adopting a Hamming code encoding and decoding method. Background technique [0002] To design SRAM for fault tolerance, before the single event effect test on the accelerator, the chip is usually simulated in a conventional environment to verify the ruggedized design. Now generally adopt the method of fault injection to simulate the single event flipping effect. Fault injection systems are tools developed for fault-tolerant designs to evaluate their effectiveness. Fault injection is a technology that simulates the generation of faults. It injects or sets hardware or software faults in the verified system by artificial means. The failure of the system can occur, so that the effectiveness of the fault-tolerant design for faults can be verified. sex. At pr...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C29/08
Inventor 杨献王雷蒋见花刘海南黑勇周玉梅
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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