Method and device for increasing efficiency of DDR (Double Data Rate) controller
A controller and efficiency technology, applied in the field of data communication, can solve the problems of unserviceable commands, increased data delay, and inability to take into account the input sequence of user commands before and after, to achieve the effect of saving space consumption and improving efficiency
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[0051] It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.
[0052] figure 2 Shown is the flow process of the method for improving DDR controller efficiency in one embodiment of the present invention, and this flow process comprises the following steps:
[0053] Step S10, cache and manage user commands in queue form in time sequence; in one embodiment, a shift register can be used to cache and manage user commands in queue form in time sequence, for example, when multiple user commands are input, the Each storage unit in the shift register is sequentially buffered. In a specific example, the shift register not only has a command output port at the head, but each storage unit also has a command output port, which can output commands sequentially from the head of the queue to the tail of the queue, and can also randomly extract commands for output.
[0054]Step S20, other orde...
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