Method for etching semiconductor

Abstract

The invention relates to a method for etching a semiconductor. In the method, after completion of the lithography process of an upper mask layer, the final critical size of a material to be etched is regulated again in a subsequent etching process, wherein the mask layer comprises a hard mask material and has at least one prominent feature and an initial width. The method comprises the following steps of: introducing a first plasma which contains carbon and fluorine into a reaction chamber, wherein carbon and fluorine residues at least deposit on the inner wall of the reaction chamber; removing part of the mask layer by using a second plasma which is matched with the carbon and fluorine, wherein the rest hard mask material is provided with a featured pattern which has a final width different from the initial width at the at least one prominent feature; and transferring the featured pattern to a semiconductor substrate by taking the at least one prominent feature which is provided by the rest hard mask material and has the final width as an etching mask.

Description

technical field [0001] The invention relates to a photoresist layer etching method in a lithography process in a semiconductor substrate manufacturing process, in particular to a semiconductor etching method capable of finely adjusting the critical dimension of a photomask pattern. Background technique [0002] The critical dimensions (CD) and geometries of semiconductor devices and their features have been greatly reduced in size compared to when they were first introduced decades ago. [0003] Therefore, an important part of the semiconductor device manufacturing process is how to accurately pattern the thin film on the device substrate. In conventional techniques, such thin film patterning is performed on a semiconductor wafer using chemical reactions of gases. When patterning this film, it is desirable to minimize variation in width and other critical dimensions. Errors in these critical dimension variations can cause variations in device characteristics or cause unnec...

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Problems solved by technology

[0004] However, a major disadvantage of the traditional method is that the final critical dimension of the material to be etched (such as polysilicon gate or metal line) is completely limited by the critical dimension of the upper mask layer after the lithography process is completed.

In this case, the final CD cannot be adjusted again in the etching process after the lithography process is completed

[0005] This shows that above-mentioned existing semiconductor device manufacturing method obviously still has inconvenience and defect in method and use, and urgently needs to be further improved.

In order to solve the above-mentioned problems, the relevant manufacturers have tried their best to find a solution, but no suitable design has been developed for a long time, and the general method has no suitable method to solve the above-mentioned problems. This is obviously related. The problem that the industry is eager to solve

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