Eureka AIR delivers breakthrough ideas for toughest innovation challenges, trusted by R&D personnel around the world.

Digital video interface data recovery circuit

A technology of digital video interface and recovery circuit, which is applied in the direction of TV, electrical components, color TV, etc., can solve the problem of insufficient stability of digital phase-locked loop, reduce the bit error rate of data transmission, etc., and achieve the solution of possible instability and reduce bit error rate effect

Active Publication Date: 2012-07-04
CHENGDU CORPRO TECH CO LTD
View PDF5 Cites 6 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] The invention proposes a digital video interface data recovery circuit, which can solve the problem that the digital phase-locked loop in the prior art may not be stable enough, and reduce the bit error rate of data transmission

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Digital video interface data recovery circuit
  • Digital video interface data recovery circuit
  • Digital video interface data recovery circuit

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0061] The present invention will be further elaborated below in conjunction with the accompanying drawings.

[0062] like figure 1 As shown, a digital video interface data recovery circuit, the circuit includes a charge pump phase-locked loop 101, an oversampler 201, and a data recovery unit 300. Wherein, the data recovery unit 300 includes a DE detector 301 , a phase detection logic unit 302 , a phase detection preprocessing unit 303 , an output data selection unit 304 , and a phase control FSM 305 .

[0063] The charge pump phase-locked loop 101 receives the TMDS clock signal 10 and outputs a 20-phase clock signal CLK[0:19] 102 twice the frequency of the TMDS clock. The oversampler 201 receives the TMDS data signal 20, and the sampling clock is a 20-phase clock CLK[0:19] 102 twice the frequency of the TMDS clock. In one TMDS clock cycle, the oversampler outputs 40-bit parallel data D[0: 39] 30, that is, one TMDS data is sampled four times.

[0064] The DE detector 301 re...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a digital video interface data recovery circuit, which comprises a charge pump phase-locked loop, an oversampler and a data recovery unit; the charge pump phase-locked loop receives TMDS (Transition Minimized Differential Signaling) clock input and generates 20-phase clock output two times higher than TMDS clock frequency; the oversampler samples the inputted high-speed serial TMDS data signals; and the data recovery unit recovers raw digital video data according to the 40-bit parallel data outputted by the oversampler. The digital video interface data recovery circuit provided by the invention can solve the problem that the digital phase-locked loop in the prior art is not stable enough, and the error rate of data transmission is decreased.

Description

technical field [0001] The invention relates to a data recovery circuit of a digital video interface, in particular to a data recovery circuit with an oversampling structure. [0002] Background technique [0003] Digital video interface or high-definition multimedia interface is encoded by Transition Minimized Differential Signaling (hereinafter referred to as TMDS). TMDS encoding converts 8-bit original digital video signal into 10-bit serial with minimized transmission difference. The signal sequence, the line and field signals are directly encoded into a 10-bit serial signal sequence, and the line and field signals are distinguished from the original digital video signal by a Data Enable (hereinafter referred to as DE) signal. A complete TMDS transmission link includes a clock TMDS channel and three data TMDS channels, the frequency of the clock TMDS channel is 25~165MHz, and the three data TMDS channels are used to transmit red (R), green (G), blue ( B) For the serial...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H04N5/765H04N21/2368H04N7/083H04N21/434
Inventor 但泽杨
Owner CHENGDU CORPRO TECH CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com