Circuitry built-in test device based on boundary scanning mechanism

A technology of boundary scan and circuit system, applied in the direction of electronic circuit test, measuring device, measuring circuit, etc., can solve the problems of weak self-test and diagnosis ability, lack of in-machine self-test means, multi-level structure and composition, etc., to improve The effect of testing diagnostic capabilities, improving overall testing capabilities, and improving testing efficiency

Inactive Publication Date: 2012-07-18
NAT UNIV OF DEFENSE TECH
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  • Summary
  • Abstract
  • Description
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  • Application Information

AI Technical Summary

Problems solved by technology

However, for complex circuit systems in space vehicles such as satellites and spaceships, due to the multi-level structure and complex circuits, there is currently a lack of effective in-machine self-test means, and the self-test and diagnosis capabilities are not strong. reliability and safety

Method used

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  • Circuitry built-in test device based on boundary scanning mechanism
  • Circuitry built-in test device based on boundary scanning mechanism
  • Circuitry built-in test device based on boundary scanning mechanism

Examples

Experimental program
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Embodiment Construction

[0020] The present invention adopts a hierarchically integrated BITE structure, which is composed of subsystem-level BITE, circuit board-level BITE, and component-level BITE. like figure 1 As shown, among them, the subsystem-level BITE is interconnected with the external data management system through the system-level high-speed data bus (such as the 1553B bus), and the next level is connected with the circuit board-level BITE and the circuit board level through the system-level test and maintenance bus (such as the CAN bus). Other circuit boards under test in other subsystems are interconnected, and the circuit board-level BITE is interconnected with the component-level BITE and other components in the circuit board through the boundary scan test bus to the next level.

[0021] Sub-system level BITE consists of five units including test generation, test vector library, fault diagnosis, communication interface 1, and communication interface 2, such as figure 2 shown. The ou...

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Abstract

The invention discloses a circuitry built-in test device based on a boundary scanning mechanism, which includes a subsystem-level BITE, a circuit board-level BITE and a component-level BITE, wherein the subsystem-level BITE is mutually connected with an external data management system through a system-level high-speed data bus, and is mutually connected with the circuit board-level BITE and other to-be-tested circuit boards in other subsystems through a system test and maintenance bus in the lower level; and the circuit board-level BITE is mutually connected with the component-level BITE and other components in the circuit board through a boundary scanning test bus. The device can realize different-level fault layered diagnosis and positioning of the complicated circuitries of aero spacecrafts as satellites, and provides reference for design of the circuitry built-in test devices of other aerospace products.

Description

technical field [0001] The invention belongs to an in-machine test device, in particular to a circuit system in-machine test device based on a boundary scan mechanism. Background technique [0002] The successful launch and safe operation of space vehicles such as satellites and spacecraft have great economic value and social impact. The circuit system is an extremely important part of the aerospace vehicle. In order to ensure the reliability of the aerospace vehicle circuit system, sufficient testing must be carried out before launch, and the reliability and safety of the launch can be ensured by testing to cover all possible failures of the aircraft circuit system. sex. In order to achieve the above technical requirements, it is necessary to fully consider the requirements of test performance from the design of aerospace vehicle circuit system, and improve its test and diagnosis capabilities by embedding in-board test devices. [0003] Built-in test (BIT: Built-in test) ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/28G01R31/02
Inventor 胡政杨定新李岳王南天宋立军
Owner NAT UNIV OF DEFENSE TECH
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