Data access and storage system and method for weak consistency storage model

Abstract

The invention discloses a data access and storage system and a method for a weak consistency storage model. The data access and storage system comprises at least two processors, each processor is connected with at least one first cache layer serving as a private cache and at least a second cache layer serving as a shared cache, and the first cache layer is connected with the second cache layer through a network-on-chip. The network-on-chip comprises a consistency access and storage control module and a request response module, wherein the consistency access and storage control module is used for controlling the state conversion of the private cache and the shared cache under different access and storage requests while performing access and storage operation between the processors, the request response module is used for transmitting request of state conversion and response data bag between the private cache and the shared cache through the network-on-chip. The data access and storage system and the method for the weak consistency storage model effectively avoid the defect that an interception method can be only based on a bus structure, simultaneously reduce communication expenditure of huge network-on-chips in a directory method, avoid waste of storage space brought by the directory method, and enhance the expansibility of the system.

Description

technical field [0001] The present invention relates to the technical field of shared storage system data access, in particular to a storage consistency model (Memory consistent model) and a cache (cache) consistency protocol (Cache coherent protocol) in a network on chip (Network on Chip, NOC) shared storage The field of data access technology, in particular, relates to a data access system and method based on a weak consistency model-based directory-less cache (cache) consistency protocol for data race free (Data Race Free, DRF) programs. Background technique [0002] With the research and development of modern multi-core shared storage systems, there are multiple shared storage systems with memory consistent models (Memory consistent model) in the prior art, including shared storage systems with sequential consistency models (Sequential Consistency). [0003] The storage consistency model describes the correctness of storage operations during program execution. Storage o...

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Problems solved by technology

[0018] However, the directory storage capacity required by the directory-based cache (cache) coherency method increases rapidly with the increase in the number of processors in the system. When there are many processors, the overhead of implementing the directory method becomes very large, resulting in caching The utilization rate of (cache) is reduced; secondly, this method will issue invalid or update operations to all processors that have the data backup through the network on chip (NOC) with each write operation, and a large number of operations are unnecessary, these additional The communication overhead increases the burden of the network-on-chip (NOC) and affects system performance; in addition, the complexity of maintaining directory information also severely limits the scalability of the system

[0019] Although the no-directory method based on the listening bus is simple and effective, it avoids the storage overhead of the directory, but because it requires broadcasting, it is only suitable for shared bus structures with poor scalability; and there is also excessive communication overhead, which seriously affects system performance. The problem

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