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Mask plate and method for manufacturing thin film transistor array substrate using same

A mask and substrate technology, applied in the semiconductor field, can solve the problems of uneven distribution of photoresist thickness, reduction of product yield, removal, etc., to prevent the increase in difficulty of etching process, the reduction of product yield, and the prevention of thickness uneven distribution

Active Publication Date: 2017-02-01
BOE TECH GRP CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, the high-concentration developer in the peripheral circuit area will diffuse to the low-concentration developer in the display area, so that the amount of photoresist removed in the half-exposed area adjacent to the peripheral circuit area will be increased, resulting in photolithography in the half-exposed area. The peripheral morphology of the glue becomes worse, and even the photoresist in the half-exposed area is completely removed
[0008] Since the thickness of photoresist in part of the half-exposed area in the display area is affected by the high-concentration developer in the adjacent peripheral circuit area, the thickness of photoresist is unevenly distributed in the display area, which increases the difficulty of the etching process. It is difficult to control parameters, resulting in the appearance of etching spots (Mura), which in turn leads to a decrease in product yield

Method used

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  • Mask plate and method for manufacturing thin film transistor array substrate using same
  • Mask plate and method for manufacturing thin film transistor array substrate using same
  • Mask plate and method for manufacturing thin film transistor array substrate using same

Examples

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Embodiment 1

[0033] figure 2 A mask plate provided by an embodiment of the present invention includes a first pattern area I and a second pattern area II.

[0034] The mask plate is used to manufacture the planar electric field type TFT-LCD array substrate, the first pattern area I is used to form a pixel array pattern on the photoresist in the display area of ​​the array substrate, and the second pattern area II is used to form a pixel array pattern on the peripheral circuit area of ​​the array substrate. A peripheral circuit pattern is formed on the photoresist, and the mask plate also includes a redundant pattern 21 disposed between the pattern area I and the pattern area II.

[0035] After using the mask to expose the photoresist on the array substrate, in the process of developing, the display area pattern and the peripheral circuit area pattern can be formed on the photoresist, as well as the light between the display area pattern and the peripheral circuit area pattern. Resist red...

Embodiment 2

[0040] This embodiment provides a method for manufacturing a thin film transistor array substrate. The array substrate is a planar electric field type TFT-LCD array substrate, which adopts the currently widely used 4-time mask process. Different from the prior art, this EXAMPLES In the first masking step, a reticle with a redundant pattern was used.

[0041] The manufacturing method includes the following 4 steps.

[0042] 1. Perform a first photolithography process on the substrate using a first mask, the first mask including a first pattern area, a second pattern area, and a redundant pattern disposed between the two pattern areas. The first pattern area is used for exposing the display area of ​​the substrate to form a first transparent common electrode layer and a gate electrode on the display area of ​​the substrate. The second pattern area is used to expose the peripheral circuit area of ​​the substrate.

[0043] After using the mask to expose the photoresist on the ar...

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Abstract

The invention discloses a mask plate and a method for manufacturing a thin film transistor array substrate using the same, relates to the mask technology in the field of semiconductors, and solves the problem of the gap between each pattern area on the photoresist in the photolithography process using the existing two-tone mask plate. During the period, the high-concentration developer solution diffuses to the low-concentration developer solution. In the present invention, redundant patterns are set in two pattern intervals on the mask, and the mask is used to expose the photoresist, so that in the developing process, the photoresist corresponding to the redundant pattern of the mask formed on the photoresist A redundant pattern, the photoresist redundant pattern can block the diffusion of high-concentration developing solution to low-concentrating developing solution, thereby improving product yield. The invention is mainly used in the manufacture of the array substrate of the planar electric field type thin film transistor liquid crystal display.

Description

technical field [0001] The invention relates to mask technology in the field of semiconductors, in particular to a mask plate and a method for manufacturing a thin film transistor array substrate using the same. Background technique [0002] In the process of preparing the planar electric field type TFT-LCD array substrate, a two-tone mask (for example: a grayscale mask or a semi-permeable film) is used. Semi-transparent area. After using the mask to expose the photoresist, an exposure area is formed on the photoresist corresponding to the translucent area, a non-exposed area is formed on the photoresist corresponding to the opaque area, and a non-exposed area is formed on the photoresist corresponding to the semi-transparent area. A half-exposed area is formed. After the photoresist that has undergone the exposure process is developed, a part of the photoresist in the half-exposed area is removed. [0003] Since the semi-exposed area needs to undergo two subsequent etchi...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G03F1/76
CPCH01L27/1288G03F1/50G03F1/76
Inventor 惠官宝崔承镇张锋薛建设
Owner BOE TECH GRP CO LTD