Shift register and grid line driving device

Abstract

The invention discloses a shift register and a grid line driving device, which relate to the technical field of liquid crystal display. In order to reduce noise jamming of the shift register at the standby unattended time, the shift register and the grid line driving device are invented. The shift register comprises a first thin film transistor, a second thin film transistor, a third thin film transistor, a fourth thin film transistor, a capacitor and a drop-down module, wherein the drop-down module connected among a clock signal end, a first node and a signal output end is connected with a low level signal end and used for maintaining the first node and the signal output end to have a low level at the standby unattended time of the shift register. The grid line driving device comprises a plurality of the shift registers which are connected in series. The grid line driving device can be used for driving a grid line.

Description

technical field [0001] The invention relates to the technical field of liquid crystal display, in particular to a shift register and a gate line driving device. Background technique [0002] The pixel array of the liquid crystal display panel includes multiple rows of gate lines and multiple columns of data lines. Wherein, the driving of the gate line can be realized through the attached integrated driving circuit, so it is necessary to reserve a certain area at the edge of the array substrate of the liquid crystal display panel as the bonding (Bonding) area of ​​the integrated driving circuit and the array substrate. The fan-out (Fan-out) wiring area of ​​the upper gate line. Then the integrated driving circuit can be bound on the array substrate through a flexible circuit board COF (Chip On FPC). [0003] It can be seen that, when using the integrated driving circuit to drive the gate lines, since a certain area needs to be reserved at the edge of the array substrate, th...

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Problems solved by technology

[0005] It can be seen from the working process of the above shift register that the gate of the thin film transistor M3 and the signal output terminal Output are in a floating state during non-working hours. When the clock signal terminal is at a high level, the gate of the thin film transistor M3 is in a floating state. The parasitic capacitance may increase its leakage current, which will cause noise interference (Noise) to the signal output terminal Output, causing it to output a high level by mistake

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