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Digital phase locking method suitable for balanced three-phase power grid

A three-phase balanced, digital phase-locked technology, applied in the direction of reducing the asymmetry of the polyphase network, eliminating/reducing the asymmetry of the polyphase network, etc. It can solve the problems of complex calculation, intractability, saturation, etc

Active Publication Date: 2014-07-02
STATE GRID CORP OF CHINA +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

This phase-locked method mainly has the following disadvantages: (1) The phase-locked loop tracking method is essentially a kind of differential tracking. The error is more obvious; (2) The synchronous response speed is slow
There is a tracking delay in the phase-locked loop, and it cannot track the phase change in real time. When the frequency or phase changes greatly, it will take a certain time to track the phase change; (3) If the phase-locking method is implemented in hardware, it will be necessary to design a more complex hardware circuit At the same time, it is necessary to solve some difficult problems on the hardware, such as DC zero point drift, device saturation, initial calibration, etc.; if this phase-locking method is implemented by software, the calculation will be more complicated, the real-time performance is poor, and the system is reliable. sex is also poor

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  • Digital phase locking method suitable for balanced three-phase power grid
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  • Digital phase locking method suitable for balanced three-phase power grid

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Embodiment Construction

[0035]The specific implementation manners of the present invention will be further described in detail below in conjunction with the accompanying drawings.

[0036] The idea of ​​this embodiment is: first initialize the phase A grid voltage u a The frequency of the first cycle is 50Hz; then set u a The frequencies of other cycles are detected by the zero-crossing detection circuit u a If the frequency of the previous cycle is detected to be abnormal, a frequency failure alarm signal will be issued; if the frequency is detected to be normal, the u a The frequency of the current cycle is multiplied by the corresponding counter time △t and related simple calculations to obtain the phase A grid voltage u a The phase angle θ A , and then get the phase angle θ of the three-phase balanced grid ABC , to achieve digital phase-locking of the three-phase balanced grid.

[0037] A flow chart of a digital phase-locking method suitable for a three-phase balanced power grid provided by ...

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Abstract

The invention provides a digital phase locking method suitable for a balanced three-phase power grid. The method comprises the following steps of: initializing the frequency of a first cyclic wave of A-phase power grid voltage ua to be 50Hz; setting the frequency of each of the other cyclic waves of ua to be the that of the last cyclic wave of ua, which is detected through a zero-crossing point detection circuit, and if the frequency is detected to be abnormal, transmitting a frequency failure alarming signal; and if the frequency is detected to be normal, performing multiplication between the frequency of a current cyclic wave of ua and the time Deltat of a corresponding counter and related simple operation to obtain a phase angle ThetaA of the A-phase power grid voltage ua and further obtain a phase angle ThetaABC of the balanced three-phase power grid. The digital phase locking method is quick, accurate, stable and reliable, and the dynamic by-the-cyclic-wave refreshing of the balanced three-phase power grid is realized.

Description

technical field [0001] The invention relates to the application field of three-phase power grid control technology, in particular to a digital phase-locking method suitable for a three-phase balanced power grid. Background technique [0002] At present, the phase-locking method applied to the three-phase power grid is generally a phase closed-loop control method composed of a phase detector, a loop filter and a voltage-controlled oscillator. When the closed-loop is adjusted to a steady state, the phase of the output signal and the input signal , The frequency is synchronized. This phase-locked method mainly has the following disadvantages: (1) The phase-locked loop tracking method is essentially a kind of differential tracking. The error is more obvious; (2) The synchronous response speed is slow. There is a tracking delay in the phase-locked loop, and it cannot track the phase change in real time. When the frequency or phase changes greatly, it will take a certain time to...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H02J3/26
CPCY02E40/50
Inventor 张军军郑飞吴蓓蓓丁杰吴福保吕宏水丁明昌董颖华
Owner STATE GRID CORP OF CHINA
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