Chip extra-low in standby power consumption

Abstract

The invention discloses a chip extra-low in standby power consumption. The chip comprises a standby normally open area circuit, a digital core area circuit, a real-time clock circuit and a level converting circuit, wherein the real-time clock circuit employs a first power source, while the digital core area circuit and the standby normally open area circuit employ a second power source; the standby normally open area circuit is used for processing a wake-up request in the standby mode to wake up the chip so that the chip enters the working mode; the digital core area circuit is the core of the chip and works normally in the working mode; and the real-time clock circuit completes system clock maintenance and is used for generating continuous interruptions, and still works normally in the standby mode. The chip extra-low in standby power consumption can provide a small-scale standby circuit.

Description

technical field [0001] The invention relates to the technical field of microelectronics, in particular to a low-power SOC technology. By adopting the above architecture, an SOC chip with very low standby power consumption can be obtained. Background technique [0002] With the rapid development of integrated circuit technology, electronic consumer products represented by tablet computers and smart phones are rapidly popularized, and ultra-large-scale System on Chip (SoC) technology based on deep submicron has become the most eye-catching technology in the 21st century. As one of the key technologies, users have higher and higher requirements for the performance of such products. Many complex tasks that had to be handled on high-performance PCs (Personal Computers) in the past, such as e-mail, web browsing, camera, media playback and other application functions, can all be performed on mobile terminals. At present, high-performance SoC products are emerging in the market on...

AI Technical Summary

Problems solved by technology

The linear regulator in standby mode still works and consumes a lot of power itself

At the same time, a large part of the logic of the power management unit is not in the working mode, but it still has power supply, which also consumes a large part of the power consumption.

This low-power architecture can reduce the power consumption in standby mode to a certain extent, but the chip cannot get extremely low standby power consumption

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