static ram
A static and partial technology, applied in the field of static RAM, can solve the problems of increasing amplitude and increasing power consumption, and achieve the effect of reducing power consumption, maintaining operation speed and reliability
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[0055] First, the basic SRAM will be described.
[0056] image 3 is a diagram showing a general configuration of a basic SRAM.
[0057] A basic SRAM has a control circuit 1, a row decoder 2, a word line driver 3, a block signal circuit 4, a column decoder 5, a plurality of column switches CS0 to CSp, a data I / O circuit 6, multiple ((k+ 1) ×(m+1)) word lines WL, multiple (p+1) pairs of global bit lines GBL0 and GBLX0 to GBLp and GBLXp, multiple (p+1) pairs of extended global bit lines EGBL0 and EGBLX0 to EGBLp and EGBLXp, a plurality of ((k+1)×(p+1)) subblocks (SUBBLK) B00 to Bkp arranged corresponding to the plurality of word lines, and a plurality of bit lines provided corresponding to each pair of bit lines column circuits CL0 to CLp. As described above, the SRAM of this embodiment has a hierarchical structure in which pairs of short local bit lines are connected to the pair of long global bit lines.
[0058] The control circuit 1 generates an operation control signal s...
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