Automatic simulation method and system for time division multiplexing (TDM) link based on field programmable gate array (FPGA)

Abstract

The invention provides an automatic simulation method and a system for a TDM link based on the FPGA. The method includes: S1, constructing a main exchange FPGA chip, a plurality of branch exchange FPGA chips and a plurality of simulation devices, wherein the main exchange FPGA chip comprises a control unit and is controlled by the control unit, the plurality of branch exchange FPGA chips are connected with the main exchange FPGA chip, the plurality of simulation devices are connected with E1 interface chips of the branch exchange FPGA chips, and the E1 interface chips are connected to an external tested E1 link; S2, determining a link ID to be simulated and simulation actions, and the control unit sending a corresponding control instruction to the exchange FPGA chips; and S3, selecting the E1 link to be simulated according to the control instruction and performing simulation of corresponding simulation actions based on the selected E1 link. According to the method and the system, the simulation test to the TDM link is achieved through the simulation device completely, the process is completed automatically, artificial participation is avoided, the test efficiency is greatly improved, and the coverage rate of the tests is expanded.

Description

technical field [0001] The invention relates to the technology in the field of network communication, in particular to an FPGA-based TDM link exchange and link fault automatic simulation method and a corresponding simulation system. Background technique [0002] At present, in order to verify the function and robustness of TDM technology-based circuit switching equipment produced by domestic and foreign communication equipment manufacturers, it is usually necessary to perform various tests such as circuit connection and switching in the laboratory for different networking tests. , where the test scheme usually includes testing the ability of the device to handle circuit anomalies. [0003] In the prior art, switching the networking mode or simulating the abnormal circuit mode in the test scheme is generally realized by manually plugging and unplugging the E1 line by the tester. However, manual fault simulation cannot achieve 24-hour uninterrupted testing. In addition, in th...

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Problems solved by technology

However, manual fault simulation cannot achieve 24-hour uninterrupted testing. In addition, in the case of a large-scale network, manual switching is prone to problems due to improper human operation due to the large number of interfaces. Troubleshooting after a problem occurs is very difficult; more importantly, artificial simulation of circuit faults is not repeatable, and the circuit interruption time cannot be precisely controlled

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